From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx08-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5B6C4275B09; Mon, 28 Jul 2025 15:35:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.207.212.93 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753716933; cv=none; b=ozb4Ag1JdZU/vqjp1b4w7hrluZ39bDpaYYXkS0IlowYyVtfhc+wqx8CuCz4YX8/grl9GdG/rS9HqzdplyDmOhqeeAstYJvXQwRbELb0rqUVXlZfcZqQOA6agy8WMOXulqFweuobNyBUMN6/QNrgYoGDjOgpMpzq3w3/qm8Adshw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753716933; c=relaxed/simple; bh=pay9TmTh3yLow9rYjWJAd2mCiKrqeCMu+ieuOzNTvQs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=abF+jaG682QBr1d8Ozh+KpRHdnWN0HJyBXzy/OJqnXo0ugHCxFwytUcRU37LZmuJ8YsZzr5b3AcR1eVfG5BzVmmpboXa21UCmpDi/VAlpQgCaSRyxshJyX2CNBQB4E+6YmbjLfNHsj5zJ0PWaBj3U405GxWiKJOpMB9E73Hq/Ho= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=lf5iHL0+; arc=none smtp.client-ip=91.207.212.93 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="lf5iHL0+" Received: from pps.filterd (m0369457.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 56SFGkj2005578; Mon, 28 Jul 2025 17:35:16 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= qThLZiY/wcF/wXoPU6DZ22JEMA0Tul4CRJwH6uwAl+U=; b=lf5iHL0+7DUBSdGL mfVMnrWDcGSa4KXl8h+DQ7ZBYZ2zTNs1gsxF1VycNwwTq/2C4vwcPWArasv1SrIW yKQvdoXlxfJ1576PrMHWD9WkqZQ9eM8vnOPJL6/8deBCKqvnXmgpWJNbKcQC4gV1 XpHNw0fbzCEhAYRzDZOA8lAjOukHmk5QlPaEQmXpjS8jKvdBKfexiJjsKPZXtspk Q0e2bytMWc0Oyh050R5wuvpBRsZ11RGM4bKoD4+saxhEG2qZhHXWVO80ykstWSfl Hv+WcPAGDMCDEglUw3oLD5eTN2GoK2OGpdc+Ef8HkYgeNBWpOQHFKGxILBfudMti KCZinA== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 4859yndyug-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 28 Jul 2025 17:35:16 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 9135840051; Mon, 28 Jul 2025 17:33:49 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 1B71F78C90E; Mon, 28 Jul 2025 17:30:07 +0200 (CEST) Received: from localhost (10.252.23.100) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 28 Jul 2025 17:30:06 +0200 From: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= Date: Mon, 28 Jul 2025 17:29:48 +0200 Subject: [PATCH v5 17/20] ARM: dts: stm32: add ddrperfm on stm32mp151 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-ID: <20250728-ddrperfm-upstream-v5-17-03f1be8ad396@foss.st.com> References: <20250728-ddrperfm-upstream-v5-0-03f1be8ad396@foss.st.com> In-Reply-To: <20250728-ddrperfm-upstream-v5-0-03f1be8ad396@foss.st.com> To: Will Deacon , Mark Rutland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Jonathan Corbet , Gatien Chevallier , Michael Turquette , Stephen Boyd , Gabriel Fernandez , Krzysztof Kozlowski , Le Goffic , Julius Werner CC: , , , , , , , =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= X-Mailer: b4 0.15-dev-8018a X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-28_03,2025-07-28_01,2025-03-28_01 The DDRPERFM is the DDR Performance Monitor embedded in STM32MP151 SoC. Signed-off-by: Clément Le Goffic --- arch/arm/boot/dts/st/stm32mp151.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi index 0daa8ffe2ff5..e121de52a054 100644 --- a/arch/arm/boot/dts/st/stm32mp151.dtsi +++ b/arch/arm/boot/dts/st/stm32mp151.dtsi @@ -383,6 +383,13 @@ usbphyc_port1: usb-phy@1 { }; }; + ddrperfm: perf@5a007000 { + compatible = "st,stm32mp151-ddr-pmu", "st,stm32mp131-ddr-pmu"; + reg = <0x5a007000 0x400>; + clocks = <&rcc DDRPERFM>; + resets = <&rcc DDRPERFM_R>; + }; + rtc: rtc@5c004000 { compatible = "st,stm32mp1-rtc"; reg = <0x5c004000 0x400>; -- 2.43.0