From: Nishanth Menon <nm@ti.com>
To: Jan Kiszka <jan.kiszka@siemens.com>
Cc: <huaqian.li@siemens.com>, <lkp@intel.com>,
<baocheng.su@siemens.com>, <bhelgaas@google.com>,
<christophe.jaillet@wanadoo.fr>, <conor+dt@kernel.org>,
<devicetree@vger.kernel.org>, <diogo.ivo@siemens.com>,
<helgaas@kernel.org>, <kristo@kernel.org>, <krzk+dt@kernel.org>,
<kw@linux.com>, <linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<lpieralisi@kernel.org>, <oe-kbuild-all@lists.linux.dev>,
<robh@kernel.org>, <s-vadapalli@ti.com>, <ssantosh@kernel.org>,
<vigneshr@ti.com>
Subject: Re: [PATCH v12 3/7] soc: ti: Add IOMMU-like PVU driver
Date: Tue, 29 Jul 2025 11:23:38 -0500 [thread overview]
Message-ID: <20250729162338.so7evngndnysg4ui@cinnamon> (raw)
In-Reply-To: <bdb5a5e2-3a7e-4050-bf25-c95dfa05138a@siemens.com>
On 18:11-20250729, Jan Kiszka wrote:
> On 29.07.25 14:22, Nishanth Menon wrote:
> > On 10:36-20250728, huaqian.li@siemens.com wrote:
> >> From: Jan Kiszka <jan.kiszka@siemens.com>
> >>
> >> The TI Peripheral Virtualization Unit (PVU) permits to define a limited
> >> set of mappings for DMA requests on the system memory. Unlike with an
> >> IOMMU, there is no fallback to a memory-backed page table, only a fixed
> >> set of register-backed TLBs. Emulating an IOMMU behavior appears to be
> >> the more fragile the more fragmentation of pending requests occur.
> >>
> >> Therefore, this driver does not expose the PVU as an IOMMU. It rather
> >> introduces a simple, static interface to devices that are under
> >> restricted-dma-pool constraints. They can register their pools with the
> >> PVUs, enabling only those pools to work for DMA. As also MSI is issued
> >> as DMA, the PVU already register the related translator region of the
> >> AM654 as valid DMA target.
> >>
> >> This driver is the essential building block for limiting DMA from
> >> untrusted devices to clearly defined memory regions in the absence of a
> >> real IOMMU (SMMU).
> >>
> >> Co-developed-by: Diogo Ivo <diogo.ivo@siemens.com>
> >> Signed-off-by: Diogo Ivo <diogo.ivo@siemens.com>
> >> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> >> Signed-off-by: Li Hua Qian <huaqian.li@siemens.com>
> >> ---
> >> drivers/soc/ti/Kconfig | 4 +
> >> drivers/soc/ti/Makefile | 1 +
> >> drivers/soc/ti/ti-pvu.c | 500 ++++++++++++++++++++++++++++++++++++++++
> >> include/linux/ti-pvu.h | 32 +++
> >> 4 files changed, 537 insertions(+)
> >> create mode 100644 drivers/soc/ti/ti-pvu.c
> >> create mode 100644 include/linux/ti-pvu.h
> >>
> >> diff --git a/drivers/soc/ti/Kconfig b/drivers/soc/ti/Kconfig
> >> index 1a93001c9e36..af7173ad84de 100644
> >> --- a/drivers/soc/ti/Kconfig
> >> +++ b/drivers/soc/ti/Kconfig
> >> @@ -82,6 +82,10 @@ config TI_PRUSS
> >> processors on various TI SoCs. It's safe to say N here if you're
> >> not interested in the PRU or if you are unsure.
> >>
> >> +config TI_PVU
> >> + bool "TI Peripheral Virtualization Unit driver"
> >
> > tristate please? Prefer to make this as a module.
> >
> >
>
> PCI_KEYSTONE is bool and needs this (if enabled). So this won't be a
> module in practice.
>
Something of the form of
https://lore.kernel.org/all/20250307103128.3287497-1-s-vadapalli@ti.com/
will need to be done then.
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
https://ti.com/opensource
next prev parent reply other threads:[~2025-07-29 16:37 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-28 2:36 [PATCH v12 0/7] soc: ti: Add and use PVU on K3-AM65 for DMA isolation huaqian.li
2025-07-28 2:36 ` [PATCH v12 1/7] dt-bindings: soc: ti: Add AM65 peripheral virtualization unit huaqian.li
2025-07-28 2:36 ` [PATCH v12 2/7] dt-bindings: PCI: ti,am65: Extend for use with PVU huaqian.li
2025-07-28 2:36 ` [PATCH v12 3/7] soc: ti: Add IOMMU-like PVU driver huaqian.li
2025-07-29 12:22 ` Nishanth Menon
2025-07-29 16:11 ` Jan Kiszka
2025-07-29 16:23 ` Nishanth Menon [this message]
2025-07-28 2:36 ` [PATCH v12 4/7] PCI: keystone: Add support for PVU-based DMA isolation on AM654 huaqian.li
2025-07-28 2:36 ` [PATCH v12 5/7] arm64: dts: ti: k3-am65-main: Add PVU nodes huaqian.li
2025-07-28 2:37 ` [PATCH v12 6/7] arm64: dts: ti: k3-am65-main: Add VMAP registers to PCI root complexes huaqian.li
2025-07-28 2:37 ` [PATCH v12 7/7] arm64: dts: ti: iot2050: Add overlay for DMA isolation for devices behind PCI RC huaqian.li
2025-08-27 12:55 ` [PATCH v12 0/7] soc: ti: Add and use PVU on K3-AM65 for DMA isolation Manivannan Sadhasivam
2025-08-28 11:24 ` [PATCH v12 0/7] soc: ti: Add and use PVU on K3-AM65 for DMA huaqian.li
2025-08-28 12:04 ` Nishanth Menon
2025-08-28 15:53 ` (subset) [PATCH v12 0/7] soc: ti: Add and use PVU on K3-AM65 for DMA isolation Manivannan Sadhasivam
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