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From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: mbrugger@suse.com, chester62515@gmail.com,
	ghennadi.procopciuc@oss.nxp.com, shawnguo@kernel.org,
	s.hauer@pengutronix.de
Cc: s32@nxp.com, kernel@pengutronix.de, festevam@gmail.com,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 5/8] arm64: dts: s32g2: Add the Software Timer Watchdog (SWT) description
Date: Wed, 30 Jul 2025 21:50:18 +0200	[thread overview]
Message-ID: <20250730195022.449894-6-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <20250730195022.449894-1-daniel.lezcano@linaro.org>

Referred in the documentation as the Software Timer Watchdog (SWT),
the s32g2 has 7 watchdogs. The number of watchdogs is designed to
allow dedicating one watchdog per Cortex-M7/A53 present on the SoC.

Describe them in the device tree.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 arch/arm64/boot/dts/freescale/s32g2.dtsi | 56 ++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index 3e775d030e37..12ce02525ae1 100644
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -566,5 +566,61 @@ stm6: timer@40224000 {
 			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 			status = "disabled";
 		};
+
+		swt0: watchdog@40100000 {
+			compatible = "nxp,s32g2-swt";
+			reg = <0x40100000 0x1000>;
+			clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>;
+			clock-names = "counter", "module", "register";
+			status = "disabled";
+		};
+
+		swt1: watchdog@40104000 {
+			compatible = "nxp,s32g2-swt";
+			reg = <0x40104000 0x1000>;
+			clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>;
+			clock-names = "counter", "module", "register";
+			status = "disabled";
+		};
+
+		swt2: watchdog@40108000 {
+			compatible = "nxp,s32g2-swt";
+			reg = <0x40108000 0x1000>;
+			clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>;
+			clock-names = "counter", "module", "register";
+			status = "disabled";
+		};
+
+		swt3: watchdog@4010c000 {
+			compatible = "nxp,s32g2-swt";
+			reg = <0x4010c000 0x1000>;
+			clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>;
+			clock-names = "counter", "module", "register";
+			status = "disabled";
+		};
+
+		swt4: watchdog@40200000 {
+			compatible = "nxp,s32g2-swt";
+			reg = <0x40200000 0x1000>;
+			clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>;
+			clock-names = "counter", "module", "register";
+			status = "disabled";
+		};
+
+		swt5: watchdog@40204000 {
+			compatible = "nxp,s32g2-swt";
+			reg = <0x40204000 0x1000>;
+			clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>;
+			clock-names = "counter", "module", "register";
+			status = "disabled";
+		};
+
+		swt6: watchdog@40208000 {
+			compatible = "nxp,s32g2-swt";
+			reg = <0x40208000 0x1000>;
+			clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>;
+			clock-names = "counter", "module", "register";
+			status = "disabled";
+		};
 	};
 };
-- 
2.43.0


  parent reply	other threads:[~2025-07-30 19:53 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-30 19:50 [PATCH 0/8] Add the STM and the SWT descriptions for the s32g2 and s32g3 Daniel Lezcano
2025-07-30 19:50 ` [PATCH 1/8] arm64: dts: s32g2: Add the STM description Daniel Lezcano
2025-07-30 20:19   ` Frank Li
2025-07-30 21:15     ` Daniel Lezcano
2025-07-31 23:20       ` Frank Li
2025-08-01  8:35         ` Daniel Lezcano
2025-07-30 19:50 ` [PATCH 2/8] arm64: dts: s32g274-rd2: Enable the STM timers Daniel Lezcano
2025-07-30 20:21   ` Frank Li
2025-07-30 21:15     ` Daniel Lezcano
2025-07-31 23:17       ` Frank Li
2025-08-01  8:23         ` Daniel Lezcano
2025-07-30 19:50 ` [PATCH 3/8] arm64: dts: s32g3: Add the STM descriptions Daniel Lezcano
2025-07-30 19:50 ` [PATCH 4/8] arm64: dts: s32g399a-rdb3: Enable the STM timers Daniel Lezcano
2025-07-30 19:50 ` Daniel Lezcano [this message]
2025-07-30 20:23   ` [PATCH 5/8] arm64: dts: s32g2: Add the Software Timer Watchdog (SWT) description Frank Li
2025-07-30 19:50 ` [PATCH 6/8] arm64: dts: s32g274-rd2: Enable the SWT watchdog Daniel Lezcano
2025-07-30 19:50 ` [PATCH 7/8] arm64: dts: s32g3: Add the Software Timer Watchdog (SWT) description Daniel Lezcano
2025-07-30 19:50 ` [PATCH 8/8] arm64: dts: s32g399a-rdb3: Enable the SWT watchdog Daniel Lezcano

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