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[130.180.211.218]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4589ee57c18sm28121285e9.28.2025.07.31.07.02.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 31 Jul 2025 07:02:00 -0700 (PDT) From: Daniel Lezcano To: mbrugger@suse.com, chester62515@gmail.com, ghennadi.procopciuc@oss.nxp.com, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: s32@nxp.com, kernel@pengutronix.de, festevam@gmail.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Ghennadi Procopciuc , Thomas Fossati Subject: [PATCH v2 4/8] arm64: dts: s32g399a-rdb3: Enable the STM timers Date: Thu, 31 Jul 2025 16:01:37 +0200 Message-ID: <20250731140146.62960-5-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250731140146.62960-1-daniel.lezcano@linaro.org> References: <20250731140146.62960-1-daniel.lezcano@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The platform has 8 CPUs, and the Linux STM timer driver is instantiated per CPU. Enable 8 STM timers that can be used as replacements for the ARM architected timers. The remaining STM timers are not useful to the Linux kernel and provide no benefit, so they are left disabled. Enable STM0 to STM6 and STM8 on the s32g399a-rdb3 platform. STM7 is skipped, as it differs slightly from the others and requires an additional property to be properly handled by the driver. Signed-off-by: Daniel Lezcano Cc: Ghennadi Procopciuc Cc: Thomas Fossati --- .../boot/dts/freescale/s32g399a-rdb3.dts | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts b/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts index 802f543cae4a..467e0c105c3f 100644 --- a/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts +++ b/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts @@ -40,6 +40,38 @@ &uart1 { status = "okay"; }; +&stm0 { + status = "okay"; +}; + +&stm1 { + status = "okay"; +}; + +&stm2 { + status = "okay"; +}; + +&stm3 { + status = "okay"; +}; + +&stm4 { + status = "okay"; +}; + +&stm5 { + status = "okay"; +}; + +&stm6 { + status = "okay"; +}; + +&stm8 { + status = "okay"; +}; + &i2c4 { current-sensor@40 { compatible = "ti,ina231"; -- 2.43.0