From: "Théo Lebrun" <theo.lebrun@bootlin.com>
To: Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Nicolas Ferre <nicolas.ferre@microchip.com>,
Claudiu Beznea <claudiu.beznea@tuxon.dev>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Harini Katakam <harini.katakam@xilinx.com>,
Richard Cochran <richardcochran@gmail.com>,
Russell King <linux@armlinux.org.uk>
Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
"Tawfik Bayouk" <tawfik.bayouk@mobileye.com>,
"Théo Lebrun" <theo.lebrun@bootlin.com>
Subject: [PATCH net v3 14/16] net: macb: move bp->hw_dma_cap flags to bp->caps
Date: Fri, 08 Aug 2025 18:52:46 +0200 [thread overview]
Message-ID: <20250808-macb-fixes-v3-14-08f1fcb5179f@bootlin.com> (raw)
In-Reply-To: <20250808-macb-fixes-v3-0-08f1fcb5179f@bootlin.com>
Drop bp->hw_dma_cap field and put its two flags into bp->caps.
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
---
drivers/net/ethernet/cadence/macb.h | 10 ++--------
drivers/net/ethernet/cadence/macb_main.c | 28 ++++++++++++++--------------
drivers/net/ethernet/cadence/macb_ptp.c | 16 +++++++++-------
3 files changed, 25 insertions(+), 29 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index c5ab35f4ab493196b5fa9a8046a6c8edf7c82727..ed015c4d4a33746b7ed6e32127bc04318da946c8 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -748,6 +748,8 @@
#define MACB_CAPS_GIGABIT_MODE_AVAILABLE BIT(18)
#define MACB_CAPS_SG_DISABLED BIT(19)
#define MACB_CAPS_MACB_IS_GEM BIT(20)
+#define MACB_CAPS_DMA_64B BIT(21)
+#define MACB_CAPS_DMA_PTP BIT(22)
/* LSO settings */
#define MACB_LSO_UFO_ENABLE 0x01
@@ -825,11 +827,6 @@ struct macb_dma_desc {
};
#ifdef MACB_EXT_DESC
-#define HW_DMA_CAP_32B 0
-#define HW_DMA_CAP_64B (1 << 0)
-#define HW_DMA_CAP_PTP (1 << 1)
-#define HW_DMA_CAP_64B_PTP (HW_DMA_CAP_64B | HW_DMA_CAP_PTP)
-
struct macb_dma_desc_64 {
u32 addrh;
u32 resvd;
@@ -1315,9 +1312,6 @@ struct macb {
struct phy *sgmii_phy; /* for ZynqMP SGMII mode */
-#ifdef MACB_EXT_DESC
- uint8_t hw_dma_cap;
-#endif
spinlock_t tsu_clk_lock; /* gem tsu clock locking */
unsigned int tsu_rate;
struct ptp_clock *ptp_clock;
diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
index e3cf62253bb96ff245e49730dd4c4b232ce89712..52c3a352519c3f68403d859932d26b536a01affb 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -123,9 +123,9 @@ static unsigned int macb_dma_desc_get_size(struct macb *bp)
unsigned int desc_size = sizeof(struct macb_dma_desc);
#ifdef MACB_EXT_DESC
- if (bp->hw_dma_cap & HW_DMA_CAP_64B)
+ if (bp->caps & MACB_CAPS_DMA_64B)
desc_size += sizeof(struct macb_dma_desc_64);
- if (bp->hw_dma_cap & HW_DMA_CAP_PTP)
+ if (bp->caps & MACB_CAPS_DMA_PTP)
desc_size += sizeof(struct macb_dma_desc_ptp);
#endif
@@ -135,8 +135,8 @@ static unsigned int macb_dma_desc_get_size(struct macb *bp)
static unsigned int macb_adj_dma_desc_idx(struct macb *bp, unsigned int desc_idx)
{
#ifdef MACB_EXT_DESC
- bool is_ptp = bp->hw_dma_cap & HW_DMA_CAP_PTP;
- bool is_64b = bp->hw_dma_cap & HW_DMA_CAP_64B;
+ bool is_ptp = bp->caps & MACB_CAPS_DMA_PTP;
+ bool is_64b = bp->caps & MACB_CAPS_DMA_64B;
return desc_idx * (1 + is_64b + is_ptp);
#else
@@ -474,7 +474,7 @@ static void macb_init_buffers(struct macb *bp)
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
/* Single register for all queues' high 32 bits. */
- if (bp->hw_dma_cap & HW_DMA_CAP_64B) {
+ if (bp->caps & MACB_CAPS_DMA_64B) {
macb_writel(bp, RBQPH, upper_32_bits(bp->queues[0].rx_ring_dma));
macb_writel(bp, TBQPH, upper_32_bits(bp->queues[0].tx_ring_dma));
}
@@ -1006,7 +1006,7 @@ static void macb_set_addr(struct macb *bp, struct macb_dma_desc *desc, dma_addr_
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
struct macb_dma_desc_64 *desc_64;
- if (bp->hw_dma_cap & HW_DMA_CAP_64B) {
+ if (bp->caps & MACB_CAPS_DMA_64B) {
desc_64 = macb_64b_desc(bp, desc);
desc_64->addrh = upper_32_bits(addr);
/* The low bits of RX address contain the RX_USED bit, clearing
@@ -1025,14 +1025,14 @@ static dma_addr_t macb_get_addr(struct macb *bp, struct macb_dma_desc *desc)
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
struct macb_dma_desc_64 *desc_64;
- if (bp->hw_dma_cap & HW_DMA_CAP_64B) {
+ if (bp->caps & MACB_CAPS_DMA_64B) {
desc_64 = macb_64b_desc(bp, desc);
addr = ((u64)(desc_64->addrh) << 32);
}
#endif
addr |= MACB_BF(RX_WADDR, MACB_BFEXT(RX_WADDR, desc->addr));
#ifdef CONFIG_MACB_USE_HWSTAMP
- if (bp->hw_dma_cap & HW_DMA_CAP_PTP)
+ if (bp->caps & MACB_CAPS_DMA_PTP)
addr &= ~GEM_BIT(DMA_RXVALID);
#endif
return addr;
@@ -2304,7 +2304,7 @@ static netdev_tx_t macb_start_xmit(struct sk_buff *skb, struct net_device *dev)
#ifdef CONFIG_MACB_USE_HWSTAMP
if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
- (bp->hw_dma_cap & HW_DMA_CAP_PTP))
+ (bp->caps & MACB_CAPS_DMA_PTP))
skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
#endif
@@ -2784,11 +2784,11 @@ static void macb_configure_dma(struct macb *bp)
dmacfg &= ~GEM_BIT(ADDR64);
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
- if (bp->hw_dma_cap & HW_DMA_CAP_64B)
+ if (bp->caps & MACB_CAPS_DMA_64B)
dmacfg |= GEM_BIT(ADDR64);
#endif
#ifdef CONFIG_MACB_USE_HWSTAMP
- if (bp->hw_dma_cap & HW_DMA_CAP_PTP)
+ if (bp->caps & MACB_CAPS_DMA_PTP)
dmacfg |= GEM_BIT(RXEXT) | GEM_BIT(TXEXT);
#endif
netdev_dbg(bp->dev, "Cadence configure DMA with 0x%08x\n",
@@ -3568,7 +3568,7 @@ static int gem_get_ts_info(struct net_device *dev,
{
struct macb *bp = netdev_priv(dev);
- if ((bp->hw_dma_cap & HW_DMA_CAP_PTP) == 0) {
+ if (!(bp->caps & MACB_CAPS_DMA_PTP)) {
ethtool_op_get_ts_info(dev, info);
return 0;
}
@@ -4140,7 +4140,7 @@ static void macb_configure_caps(struct macb *bp,
"GEM doesn't support hardware ptp.\n");
else {
#ifdef CONFIG_MACB_USE_HWSTAMP
- bp->hw_dma_cap |= HW_DMA_CAP_PTP;
+ bp->caps |= MACB_CAPS_DMA_PTP;
bp->ptp_info = &gem_ptp_info;
#endif
}
@@ -5276,7 +5276,7 @@ static int macb_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "failed to set DMA mask\n");
goto err_out_free_netdev;
}
- bp->hw_dma_cap |= HW_DMA_CAP_64B;
+ bp->caps |= MACB_CAPS_DMA_64B;
}
#endif
platform_set_drvdata(pdev, dev);
diff --git a/drivers/net/ethernet/cadence/macb_ptp.c b/drivers/net/ethernet/cadence/macb_ptp.c
index a63bf29c4fa81b95f10aec8b8fe9918022e196d6..f4ab379f28493cffe30275fd335844ae2fefc89a 100644
--- a/drivers/net/ethernet/cadence/macb_ptp.c
+++ b/drivers/net/ethernet/cadence/macb_ptp.c
@@ -28,14 +28,16 @@
static struct macb_dma_desc_ptp *macb_ptp_desc(struct macb *bp,
struct macb_dma_desc *desc)
{
- if (bp->hw_dma_cap == HW_DMA_CAP_PTP)
- return (struct macb_dma_desc_ptp *)
- ((u8 *)desc + sizeof(struct macb_dma_desc));
- if (bp->hw_dma_cap == HW_DMA_CAP_64B_PTP)
+ if (!(bp->caps & MACB_CAPS_DMA_PTP))
+ return NULL;
+
+ if (bp->caps & MACB_CAPS_DMA_64B)
return (struct macb_dma_desc_ptp *)
((u8 *)desc + sizeof(struct macb_dma_desc)
+ sizeof(struct macb_dma_desc_64));
- return NULL;
+ else
+ return (struct macb_dma_desc_ptp *)
+ ((u8 *)desc + sizeof(struct macb_dma_desc));
}
static int gem_tsu_get_time(struct ptp_clock_info *ptp, struct timespec64 *ts,
@@ -380,7 +382,7 @@ int gem_get_hwtst(struct net_device *dev,
struct macb *bp = netdev_priv(dev);
*tstamp_config = bp->tstamp_config;
- if ((bp->hw_dma_cap & HW_DMA_CAP_PTP) == 0)
+ if (!(bp->caps & MACB_CAPS_DMA_PTP))
return -EOPNOTSUPP;
return 0;
@@ -407,7 +409,7 @@ int gem_set_hwtst(struct net_device *dev,
struct macb *bp = netdev_priv(dev);
u32 regval;
- if ((bp->hw_dma_cap & HW_DMA_CAP_PTP) == 0)
+ if (!(bp->caps & MACB_CAPS_DMA_PTP))
return -EOPNOTSUPP;
switch (tstamp_config->tx_type) {
--
2.50.1
next prev parent reply other threads:[~2025-08-08 16:52 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-08 16:52 [PATCH net v3 00/16] net: macb: various fixes & cleanup Théo Lebrun
2025-08-08 16:52 ` [PATCH net v3 01/16] dt-bindings: net: cdns,macb: allow tsu_clk without tx_clk Théo Lebrun
2025-08-08 16:52 ` [PATCH net v3 02/16] dt-bindings: net: cdns,macb: sort compatibles Théo Lebrun
2025-08-08 16:52 ` [PATCH net v3 03/16] net: macb: remove illusion about TBQPH/RBQPH being per-queue Théo Lebrun
2025-08-08 16:52 ` [PATCH net v3 04/16] net: macb: move ring size computation to functions Théo Lebrun
2025-08-08 16:52 ` [PATCH net v3 05/16] net: macb: single dma_alloc_coherent() for DMA descriptors Théo Lebrun
2025-08-08 16:52 ` [PATCH net v3 06/16] net: macb: match skb_reserve(skb, NET_IP_ALIGN) with HW alignment Théo Lebrun
2025-08-08 16:52 ` [PATCH net v3 07/16] net: macb: avoid double endianness swap in macb_set_hwaddr() Théo Lebrun
2025-08-08 16:52 ` [PATCH net v3 08/16] net: macb: use BIT() macro for capability definitions Théo Lebrun
2025-08-08 16:52 ` [PATCH net v3 09/16] net: macb: remove gap in MACB_CAPS_* flags Théo Lebrun
2025-08-08 16:52 ` [PATCH net v3 10/16] net: macb: Remove local variables clk_init and init in macb_probe() Théo Lebrun
2025-08-08 16:52 ` [PATCH net v3 11/16] net: macb: drop macb_config NULL checking Théo Lebrun
2025-08-08 16:52 ` [PATCH net v3 12/16] net: macb: simplify macb_dma_desc_get_size() Théo Lebrun
2025-08-08 16:52 ` [PATCH net v3 13/16] net: macb: simplify macb_adj_dma_desc_idx() Théo Lebrun
2025-08-08 16:52 ` Théo Lebrun [this message]
2025-08-08 16:52 ` [PATCH net v3 15/16] net: macb: introduce DMA descriptor helpers (is 64bit? is PTP?) Théo Lebrun
2025-08-08 16:52 ` [PATCH net v3 16/16] net: macb: sort #includes Théo Lebrun
2025-08-08 23:06 ` [PATCH net v3 00/16] net: macb: various fixes & cleanup Jakub Kicinski
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