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Wed, 13 Aug 2025 00:55:55 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFFejr+/favLOO8iLHlOBozznAzz7xZoBuIk5htMdciv+yIGlKh80pmUms50GL2E13VJAOM9w== X-Received: by 2002:aa7:88d6:0:b0:76b:ffd1:7722 with SMTP id d2e1a72fcca58-76e20fe52ffmr3694973b3a.24.1755071754778; Wed, 13 Aug 2025 00:55:54 -0700 (PDT) Received: from hu-tdas-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-76bccfbd22csm31395754b3a.65.2025.08.13.00.55.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Aug 2025 00:55:54 -0700 (PDT) From: Taniya Das Subject: [PATCH v4 0/7] Add support for Clock controllers for Glymur SoC Date: Wed, 13 Aug 2025 13:25:16 +0530 Message-Id: <20250813-glymur-clock-controller-v4-v4-0-a408b390b22c@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAOREnGgC/x3MQQqDMBAAwK/Inl1Ig5LYrxQPIa7p0piUjYoi/ r2hx7nMBYWEqcCzuUBo58I5VXRtA/7tUiDkqRq00r2yD40hnssm6GP2H/Q5rZJjJMG9w36w1sx KW2cmqMFXaObjn7/G+/4BxyDCIGwAAAA= X-Change-ID: 20250812-glymur-clock-controller-v4-59887f028a7d To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das Cc: Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Taniya Das , Dmitry Baryshkov , Konrad Dybcio X-Mailer: b4 0.15-dev-aa3f6 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODExMDA3NCBTYWx0ZWRfXyY7pmEf03Svq /iAugzQ1lPJeB9IqUjYshOZbo3xfpcus6lgF4Z8YLjzSTScNsAryW3MBTDT6LFG1odzRAQOdw4g SdAFtTEsfJaLua43fYHgm2X+RBEP9JaMnWr9p2W6MRPHLGWE4NzDgczemuiTOknqLsUS1D68lwb Ba5K1/KgyWnMlvIz9aXaFPJOGgROnWaCWoEUYdc1ShVf1L+jzmjMP+oesON0QkBG9Ia1E8h3yJz pg3m7hjNFYzs/2NGx6Cg4KMalADeO6fyhQdpC4d3SvBhvKRbOFsznH9pUi1ydAztJqO0Zkov2+a niKavA6hP+MpWsDjCChm6oSJohJ+qkpSfEYxudwA1art/ZdrSFeC7T/aj9+xksgHII1UVJvJjlv tUVc0SRM X-Proofpoint-GUID: Mi7I5wNvE24QGTDNZe2XJJjWkFwLaf9i X-Authority-Analysis: v=2.4 cv=TJFFS0la c=1 sm=1 tr=0 ts=689c450c cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=9iZiYaJo2d43-za_6isA:9 a=QEXdDO2ut3YA:10 a=IoOABgeZipijB_acs4fv:22 X-Proofpoint-ORIG-GUID: Mi7I5wNvE24QGTDNZe2XJJjWkFwLaf9i X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-12_08,2025-08-11_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 adultscore=0 impostorscore=0 malwarescore=0 phishscore=0 clxscore=1015 spamscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508110074 Introduce the support for Global clock controller(GCC), TCSR and the RPMH clock controller for Qualcomm's next gen compute SoC - Glymur. Device tree changes aren't part of this series and will be posted separately after the official announcement of the Glymur SoC. Changes in v4: - Update the commit message for all dt-bindings to incorporate "Glymur SoC". - Add the xo parent for the TCSR CC clocks[Abel] - Update the GCC driver to cleanup dfs_rcgs as part of 'qcom_cc_driver_data'[Dmitry] - Add RB tag from [Konrad] - Fix the broken previous patchset links. - Link to v3: https://lore.kernel.org/lkml/20250729-glymur-gcc-tcsrcc-rpmhcc-v3-0-227cfe5c8ef4@oss.qualcomm.com/ Changes in v3: - Update the commit message for all the dt-bindings [Krzysztof] - Update the commit message as required. - Link to v2: https://lore.kernel.org/all/20250724-glymur_clock_controllers-v2-0-ab95c07002b4@oss.qualcomm.com/ Changes in v2: - Drop second/last, redundant "bindings" in TCSR and also align the filename [Krzysztof] - Update the year to the copyright [Krzysztof] - Align to the new Kconfig name CLK_GLYMUR_GCC/TCSR [Abel, Bjorn] - Use qcom_cc_probe() for tcsrcc [Dmitry] - Add RB tag from [Dmitry] to patch #5 - Link to v1: https://lore.kernel.org/lkml/20250716152017.4070029-1-pankaj.patil@oss.qualcomm.com/ Signed-off-by: Taniya Das --- Taniya Das (7): dt-bindings: clock: qcom-rpmhcc: Add support for Glymur SoCs dt-bindings: clock: qcom: Document the Glymur SoC TCSR Clock Controller clk: qcom: Add TCSR clock driver for Glymur SoC clk: qcom: rpmh: Add support for Glymur rpmh clocks clk: qcom: clk-alpha-pll: Add support for Taycan EKO_T PLL dt-bindings: clock: qcom: document the Glymur Global Clock Controller clk: qcom: gcc: Add support for Global Clock Controller .../devicetree/bindings/clock/qcom,glymur-gcc.yaml | 122 + .../devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 + .../bindings/clock/qcom,sm8550-tcsr.yaml | 3 + drivers/clk/qcom/Kconfig | 17 + drivers/clk/qcom/Makefile | 2 + drivers/clk/qcom/clk-alpha-pll.h | 6 + drivers/clk/qcom/clk-rpmh.c | 22 + drivers/clk/qcom/gcc-glymur.c | 8616 ++++++++++++++++++++ drivers/clk/qcom/tcsrcc-glymur.c | 313 + include/dt-bindings/clock/qcom,glymur-gcc.h | 578 ++ include/dt-bindings/clock/qcom,glymur-tcsr.h | 24 + 11 files changed, 9704 insertions(+) --- base-commit: b1549501188cc9eba732c25b033df7a53ccc341f change-id: 20250812-glymur-clock-controller-v4-59887f028a7d Best regards, -- Taniya Das