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Thu, 14 Aug 2025 09:07:06 -0700 (PDT) From: James Clark Date: Thu, 14 Aug 2025 17:06:45 +0100 Subject: [PATCH 05/13] spi: spi-fsl-lpspi: Enumerate all pin configuration definitions Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250814-james-nxp-lpspi-v1-5-9586d7815d14@linaro.org> References: <20250814-james-nxp-lpspi-v1-0-9586d7815d14@linaro.org> In-Reply-To: <20250814-james-nxp-lpspi-v1-0-9586d7815d14@linaro.org> To: Frank Li , Mark Brown , Clark Wang , Fugang Duan , Gao Pan , Fugang Duan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Larisa Grigore , Larisa Grigore , Ghennadi Procopciuc , Ciprianmarian Costea , s32@nxp.com Cc: James Clark , linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.14.0 Add all the possible options, use names more similar to the reference manual and convert _OFFSET to _MASK so we can use FIELD_PREP() and FIELD_FITS() macros etc. This will make it slightly easier to add a DT property for this in the next commit. Signed-off-by: James Clark --- drivers/spi/spi-fsl-lpspi.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index 79b170426bee..816e48bbc810 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -69,7 +69,11 @@ #define DER_RDDE BIT(1) #define DER_TDDE BIT(0) #define CFGR1_PCSCFG BIT(27) -#define CFGR1_PINCFG (BIT(24)|BIT(25)) +#define CFGR1_PINCFG_MASK GENMASK(25, 24) +#define CFGR1_PINCFG_SIN_IN_SOUT_OUT 0 +#define CFGR1_PINCFG_SIN_ONLY 1 +#define CFGR1_PINCFG_SOUT_ONLY 2 +#define CFGR1_PINCFG_SOUT_IN_SIN_OUT 3 #define CFGR1_PCSPOL_MASK GENMASK(11, 8) #define CFGR1_NOSTALL BIT(3) #define CFGR1_HOST BIT(0) @@ -411,8 +415,9 @@ static int fsl_lpspi_dma_configure(struct spi_controller *controller) static int fsl_lpspi_config(struct fsl_lpspi_data *fsl_lpspi) { - u32 temp; + u32 temp = 0; int ret; + u8 pincfg; if (!fsl_lpspi->is_target) { ret = fsl_lpspi_set_bitrate(fsl_lpspi); @@ -422,10 +427,14 @@ static int fsl_lpspi_config(struct fsl_lpspi_data *fsl_lpspi) fsl_lpspi_set_watermark(fsl_lpspi); - if (!fsl_lpspi->is_target) - temp = CFGR1_HOST; - else - temp = CFGR1_PINCFG; + if (!fsl_lpspi->is_target) { + temp |= CFGR1_HOST; + pincfg = CFGR1_PINCFG_SIN_IN_SOUT_OUT; + } else { + pincfg = CFGR1_PINCFG_SOUT_IN_SIN_OUT; + } + temp |= FIELD_PREP(CFGR1_PINCFG_MASK, pincfg); + if (fsl_lpspi->config.mode & SPI_CS_HIGH) temp |= FIELD_PREP(CFGR1_PCSPOL_MASK, BIT(fsl_lpspi->config.chip_select)); -- 2.34.1