Re: [PATCH v7 03/13] PCI: cadence: Add register definitions for HPA(High Perf Architecture)

[Bjorn Helgaas <helgaas@kernel.org>]

On Wed, Aug 13, 2025 at 12:23:21PM +0800, hans.zhang@cixtech.com wrote:
> From: Manikandan K Pillai <mpillai@cadence.com>
> 
> Add the register offsets and register definitions for HPA(High
> Performance architecture) PCIe controllers from Cadence.

Add space in "HPA(High Performance architecture)"; also in subject.

> +++ b/drivers/pci/controller/cadence/pcie-cadence-hpa-regs.h

> +/*
> + * HPA (High Performance Architecture) PCIe controller register
> + */

Typical style would be:

  /* HPA (High Performance Architecture) PCIe controller register */

> +#define CDNS_PCIE_HPA_IP_AXI_MASTER_COMMON	0x01020000
> +/*
> + * Address Translation Registers(HPA)
> + */

Use a one-line comment and add a blank line before it.  Apply below
too.

> + * Root port register base address

s/Root port/Root Port/ to match spec and usage below.

> + * Endpoint Function BARs(HPA) Configuration Registers

Add space.

> + * Root Port Registers PCI config space(HPA) for root port function

Add space.

> +++ b/drivers/pci/controller/cadence/pcie-cadence-plat.c
> @@ -22,10 +22,6 @@ struct cdns_plat_pcie {
>  	struct cdns_pcie        *pcie;
>  };
>  
> -struct cdns_plat_pcie_of_data {
> -	bool is_rc;
> -};

Everything from here down is (as Krzysztof pointed out) much different
than the above and should be in a separate patch so the commit log can
be more specific.

Bjorn