From: Aleksander Jan Bajkowski <olek2@wp.pl>
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
tsbogend@alpha.franken.de, olek2@wp.pl, john@phrozen.org,
devicetree@vger.kernel.org, linux-mips@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 1/3] dt-bindings: mips: lantiq: Document Lantiq Xway GPTU
Date: Sat, 16 Aug 2025 15:16:22 +0200 [thread overview]
Message-ID: <20250816132002.3632343-2-olek2@wp.pl> (raw)
In-Reply-To: <20250816132002.3632343-1-olek2@wp.pl>
The Lantiq SoC has six built-in 16-bit general purpose timers (GPTU).
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
.../mips/lantiq/lantiq,gptu-xway.yaml | 67 +++++++++++++++++++
1 file changed, 67 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
diff --git a/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml b/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
new file mode 100644
index 000000000000..fcbcd98def46
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mips/lantiq/lantiq,gptu-xway.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Lantiq Xway SoC series General Purpose Timer Unit (GPTU)
+
+maintainers:
+ - Aleksander Jan Bajkowski <olek2@wp.pl>
+
+description:
+ The Lantiq SoC has six built-in 16-bit general purpose timers. The voice
+ firmware needs these timers as a reference.
+
+properties:
+ $nodename:
+ pattern: "^gptu@[0-9a-f]+$"
+
+ compatible:
+ items:
+ - enum:
+ - lantiq,ase-gptu
+ - lantiq,danube-gptu
+ - lantiq,xrx100-gptu
+ - lantiq,xrx200-gptu
+ - const: lantiq,gptu-xway
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: timer1a interrupt
+ - description: timer1b interrupt
+ - description: timer2a interrupt
+ - description: timer2b interrupt
+ - description: timer3a interrupt
+ - description: timer3b interrupt
+
+ interrupt-names:
+ items:
+ - const: timer1a
+ - const: timer1b
+ - const: timer2a
+ - const: timer2b
+ - const: timer3a
+ - const: timer3b
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+
+additionalProperties: false
+
+examples:
+ - |
+ gptu@e100a00 {
+ compatible = "lantiq,ase-gptu", "lantiq,gptu-xway";
+ reg = <0xe100a00 0x100>;
+ interrupt-parent = <&icu0>;
+ interrupts = <126>, <127>, <128>, <129> ,<130>, <131>;
+ interrupt-names = "timer1a", "timer1b", "timer2a", "timer2b",
+ "timer3a", "timer3b";
+ };
--
2.47.2
next prev parent reply other threads:[~2025-08-16 13:20 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-16 13:16 [PATCH v2 0/3] dt-bindings: mips: lantiq: Document Lantiq Xway GPTU Aleksander Jan Bajkowski
2025-08-16 13:16 ` Aleksander Jan Bajkowski [this message]
2025-08-18 17:38 ` [PATCH v2 1/3] " Conor Dooley
2025-08-19 9:15 ` Krzysztof Kozlowski
2025-08-16 13:16 ` [PATCH v2 2/3] mips: lantiq: danube: add missing timer interrupts Aleksander Jan Bajkowski
2025-08-16 13:16 ` [PATCH v2 3/3] mips: lantiq: danube: add device-specified compatible in GPTU node Aleksander Jan Bajkowski
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