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From: Ben Collins To: Krzysztof Kozlowski Cc: Jonathan Cameron , David Lechner , Nuno =?utf-8?B?U8Oh?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Hepp , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 1/5] dt-bindings: iio: mcp9600: Add microchip,mcp9601 and add constraints Message-ID: <2025081802-courageous-chital-ec8896@boujee-and-buff> Mail-Followup-To: Krzysztof Kozlowski , Jonathan Cameron , David Lechner , Nuno =?utf-8?B?U8Oh?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Hepp , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250818035953.35216-1-bcollins@kernel.org> <20250818035953.35216-2-bcollins@kernel.org> <062512ca-7069-4fc5-bcbf-a076203399f0@kernel.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="uy6n32mymkh4twkm" Content-Disposition: inline In-Reply-To: <062512ca-7069-4fc5-bcbf-a076203399f0@kernel.org> X-Migadu-Flow: FLOW_OUT --uy6n32mymkh4twkm Content-Type: text/plain; protected-headers=v1; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Subject: Re: [PATCH v5 1/5] dt-bindings: iio: mcp9600: Add microchip,mcp9601 and add constraints MIME-Version: 1.0 On Mon, Aug 18, 2025 at 08:40:26AM -0500, Krzysztof Kozlowski wrote: > On 18/08/2025 05:59, Ben Collins wrote: > > From: Ben Collins > >=20 > > The mcp9600 driver supports the mcp9601 chip, but complains about not > > recognizing the device id on probe. A separate patch... > >=20 > > iio: mcp9600: Recognize chip id for mcp9601 > >=20 > > ...addresses this. This patch updates the dt-bindings for this chip to > > reflect the change to allow explicitly setting microchip,mcp9601 as > > the expected chip type. > >=20 > > The mcp9601 also supports features not found on the mcp9600, so this > > will also allow the driver to differentiate the support of these > > features. > >=20 > > In addition, the thermocouple-type needs a default of 3 (k-type). The > > driver doesn't support this, yet. A later patch in this series adds it: > >=20 > > iio: mcp9600: Add support for thermocouple-type > >=20 > > Lastly, the open/short circuit functionality is dependent on mcp9601 > > chipsset. Add constraints for this and a new property, microchip,vsense, > > enables this feature since it depends on the chip being wired > > properly. > >=20 > > Passed dt_binding_check. >=20 > Yeah... >=20 > ... >=20 >=20 > > - interrupts =3D <25 IRQ_TYPE_EDGE_RISING>; > > - interrupt-names =3D "open-circuit"; > > + interrupts =3D <25 IRQ_TYPE_EDGE_RISIN>; >=20 > Except that it wasn't it. You need to test your final code, after you > commit. Mentioning that you tested it and then actually do not test and > send something which does not build, heh... I actually did, and fixed it, but it didn't make it into the commit when I emailed. --=20 Ben Collins https://libjwt.io https://github.com/benmcollins -- 3EC9 7598 1672 961A 1139 173A 5D5A 57C7 242B 22CF --uy6n32mymkh4twkm Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEPsl1mBZylhoRORc6XVpXxyQrIs8FAmiizcsACgkQXVpXxyQr Is+aUg/+Pnmh/68PO36tHheJkkhHTczGBJku8jji55EIo3CVfLntYiHlM6ZvKy6I Oepb96oF0TovJZ7uhkHVmk4h+YjEt/qr2nlNcC3UIms+0ak7kB/xZ8iQs+oPGjnh CXqvnDR1uGVEV+kLcvpqfyxu8ZNyVnWsvUiF1HCEw7AqZz7hmgKaq5foOcCdjrQv 1sMejsC+1dkzGsLNyB3kgGtKUpuoi7eAktP8pN4hTx2CjbVqBbNGfYcKeFH9aAGI b88Ct5m64fRQbb7uxQLEkN7T/uc6u7hgWUSrCIokJKI+bMeih5FICwUsGRFqAYmr /OsDQE/wAE7jjut4SNJdE8aeZrzMvUY2xmwUo8N81SCQvn5TkROe3+hiRYuBD83L X1+iZ+BEvF7xJg9+dZo3EWjvX/g2FOTh0bK1/HXPEn1xBlVSD/qa5LVZC/BlsOYN qkWmCJIieBO8bB8xRk+Rsrhm6MR2klKQ4gp/5x0EpInLpMM7mghpL1Qv3HQFA/3R djz7vdNFGAEwZNzFL6bA+kljSjmTLWh4pUZsihjH6tXi6P64I+93aUXAmkaewIlI NU/XerzP5620+aUXx+To6ZiJjhYCZjasygVis2JVmDBw5+WG0Zxj/3qOKz5w2PDZ H2KDaeM35IpBWSeb8QdS7C1fNS05pGSOipDVrwYeVuZLSXfun+Q= =DBi5 -----END PGP SIGNATURE----- --uy6n32mymkh4twkm--