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Fri, 22 Aug 2025 06:31:29 -0700 (PDT) From: Krzysztof Kozlowski Date: Fri, 22 Aug 2025 15:31:14 +0200 Subject: [PATCH 05/10] arm64: dts: imx8mm: Add default GIC address cells Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250822-b4-dts-interrupt-address-cells-imx-v1-5-f1b479da9340@linaro.org> References: <20250822-b4-dts-interrupt-address-cells-imx-v1-0-f1b479da9340@linaro.org> In-Reply-To: <20250822-b4-dts-interrupt-address-cells-imx-v1-0-f1b479da9340@linaro.org> To: Shawn Guo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1417; i=krzysztof.kozlowski@linaro.org; h=from:subject:message-id; bh=w5jQPRtxKVdZsfZ+Eeys3YE/WQZUF747Kck162jzCnk=; b=owEBbQKS/ZANAwAKAcE3ZuaGi4PXAcsmYgBoqHEjwIVHDMjjNUzatpKcLfCThoUYLutFRJ7cw HgSaiYJE/mJAjMEAAEKAB0WIQTd0mIoPREbIztuuKjBN2bmhouD1wUCaKhxIwAKCRDBN2bmhouD 1xTvD/991PuRFgz8vug1PKR7NPqB+k//ficQEDALcCCDOZPeAgt+1c9/AsH2VEkwsDUDtjRZIRO FOUBAHYPr/bcDoNRvgbQP0tyGrxQEtS5QWCvFnFaN8LuIysG7S/9SQ/tat5L/2N9HFwiNDduvt1 QZlTWj4WmYdxpg84+FqmiM0Thj7h3PBhU/dEvI0+L/oMLzYBbWBr9f7QuBl/Lajh2cm/1YT5bbA 1v3IL3uqm9+s97dYCDTunv6HxB/Hs5kQ+hfBw4GlleezrordICpGkCfdzZbSgxSVxLoigZYEaXc 6Cs+Lnp+HYdBC+L6lYbiqpGUz3nLnX84gDviwKOAu8hesje54hPr+fk9fzNzyRDTO62FYDsROHI ToW/ol1XArkiMnceIONQe9ZdSEiIRxt7HDdMnRhqdMrhcwT11lbT9mhxXIkcoI7MrP84arLxtf5 4N4uschFl992r4gnJGmygxE/wu3LtwtQRo2A+9DAg3UFyUbg9Dq3wkf3PPfEXq2/YVVLdjq9Izu NWBnWYMBbxlUxFrk5PX9c8RAOx0nM/5c/DpsX+NLNB3Y4VE/FVGuu+MO2PkIXjlom6uN+kwV/1f noM4ruD8BYLksYZFwpHYJpheblDAcE2fAdriS6mBT1IZWpJcfEiQseXqOmKrzaCfdhcDDxE4eAe SK9s5EkTzpKf2Qw== X-Developer-Key: i=krzysztof.kozlowski@linaro.org; a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B Add missing address-cells 0 to GIC interrupt node to silence W=1 warning: imx8mm.dtsi:1355.4-1358.29: Warning (interrupt_map): /soc@0/pcie@33800000:interrupt-map: Missing property '#address-cells' in node /soc@0/interrupt-controller@38800000, using 0 as fallback Value '0' is correct because: 1. GIC interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0) Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index ded89b04697014771c20cd7c285d01b73ac9edb9..fc3cd639310ef07d6d14c457af607f61e2288b1e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -1467,6 +1467,7 @@ gic: interrupt-controller@38800000 { compatible = "arm,gic-v3"; reg = <0x38800000 0x10000>, /* GIC Dist */ <0x38880000 0xc0000>; /* GICR (RD_base + SGI_base) */ + #address-cells = <0>; #interrupt-cells = <3>; interrupt-controller; interrupts = ; -- 2.48.1