From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx08-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8CBDC31353B; Fri, 22 Aug 2025 14:38:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.207.212.93 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755873531; cv=none; b=EG96cPpDUCRuNfTPwFNBToDCqXpvR3hBIqK9hoXtdHUqhFhv1jUAEJBU7Lm/0Wbuh4MpBVbZP5RWuBAsJzDHft0fr26x7Ne2vPu7NxDKSeNNPEIVcAyPpU2w1Y3c/32XOvXJZpuCC2J4GMaIhPsekG8q+ycyreUpEovVnJ2xCL0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755873531; c=relaxed/simple; bh=y3KwyVSYkGDmOms/buRQIUr5FSn6aSsluvTaBCmuCDc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=FflHosPz+JnfbAhsU4WI65/3KpCdyYtuKGF3L0ahXT/59TItKtxMId8syd6uxk2tbSdebtv8hi6soi0Vt0nKKcc0qQjfGDlTwQHxW2t4D9/tY331N1A/agLltQw2QcH9RKiw3hESMBMzH1hcKJqc04DDC20sj1k9l6yw3L0WW9g= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=x9YeUNOC; arc=none smtp.client-ip=91.207.212.93 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="x9YeUNOC" Received: from pps.filterd (m0369457.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 57MER31c031320; Fri, 22 Aug 2025 16:38:36 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= nFSGBWKbEisL0GA89uJu/dinOOx4UXpGBMk98ODpMrM=; b=x9YeUNOCjMyxblz5 SvRnedv2j6u5BOF9tzNFwOrEYplwvdNxIFMR06shl2/SCukira4v69ukbSfPbMzQ BBQtKRiUmos/deoBxbk+mmdF3sgtFJFDOgSJjJoGv75nsVk6Jrq9u81oY7YeNS1d 0NsWYwUJXSJDIrBRJJagRVxiD0rwX9xRcqWAImlrg8yUbxmIptJi5diT0pev0vrL g7AopyB5TsTDucxPQ4B4z6XMEygFVjsBydZFv1A4TiH/QDITyc61OGb67gxyNart 5FNU+3fYn1PBlz5GRf5cmjt2djxuaCVJ73pgcPaXHnuhUgtOaFKVkhH1TAaMFXdh ICyKKA== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 48n81wu2v8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 22 Aug 2025 16:38:36 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 160124004D; Fri, 22 Aug 2025 16:37:02 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id E6BA6726F1E; Fri, 22 Aug 2025 16:35:55 +0200 (CEST) Received: from localhost (10.130.74.180) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 22 Aug 2025 16:35:55 +0200 From: Raphael Gallais-Pou Date: Fri, 22 Aug 2025 16:34:20 +0200 Subject: [PATCH v5 11/13] arm64: dts: st: add lvds support on stm32mp255 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20250822-drm-misc-next-v5-11-9c825e28f733@foss.st.com> References: <20250822-drm-misc-next-v5-0-9c825e28f733@foss.st.com> In-Reply-To: <20250822-drm-misc-next-v5-0-9c825e28f733@foss.st.com> To: Yannick Fertre , Philippe Cornu , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , "Maxime Coquelin" , Alexandre Torgue , Catalin Marinas , Will Deacon , Christophe Roullier CC: , , , , X-Mailer: b4 0.14.2 X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-22_04,2025-08-20_03,2025-03-28_01 The LVDS is used on STM32MP2 as a display interface. Add the LVDS node. Acked-by: Yannick Fertre Signed-off-by: Raphael Gallais-Pou --- arch/arm64/boot/dts/st/stm32mp255.dtsi | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/st/stm32mp255.dtsi b/arch/arm64/boot/dts/st/stm32mp255.dtsi index 48a95af1741c42300195b753b710e714abc60d96..433a0aabe72e5a449ec03fb984a8684c5d5d75a2 100644 --- a/arch/arm64/boot/dts/st/stm32mp255.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp255.dtsi @@ -12,6 +12,18 @@ <dc { }; &rifsc { + lvds: lvds@48060000 { + compatible = "st,stm32mp255-lvds", "st,stm32mp25-lvds"; + #clock-cells = <0>; + reg = <0x48060000 0x2000>; + clocks = <&rcc CK_BUS_LVDS>, <&rcc CK_KER_LVDSPHY>; + clock-names = "pclk", "ref"; + resets = <&rcc LVDS_R>; + access-controllers = <&rifsc 84>; + power-domains = <&CLUSTER_PD>; + status = "disabled"; + }; + vdec: vdec@480d0000 { compatible = "st,stm32mp25-vdec"; reg = <0x480d0000 0x3c8>; @@ -28,4 +40,4 @@ venc: venc@480e0000 { clocks = <&rcc CK_BUS_VENC>; access-controllers = <&rifsc 90>; }; -}; \ No newline at end of file +}; -- 2.25.1