Re: [PATCH 2/2] clocksource/drivers: Add ARM SSE(Subsystems for Embedded) Timer driver

[kernel test robot <lkp@intel.com>]

Hi Jisheng,

kernel test robot noticed the following build errors:

[auto build test ERROR on tip/timers/core]
[also build test ERROR on robh/for-next linus/master v6.17-rc2 next-20250822]
[cannot apply to daniel-lezcano/clockevents/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Jisheng-Zhang/dt-bindings-timer-Add-ARM-SSE-Subsystems-for-Embedded-timer/20250822-000122
base:   tip/timers/core
patch link:    https://lore.kernel.org/r/20250821152429.26995-3-jszhang%40kernel.org
patch subject: [PATCH 2/2] clocksource/drivers: Add ARM SSE(Subsystems for Embedded) Timer driver
config: m68k-allmodconfig (https://download.01.org/0day-ci/archive/20250822/202508221736.qO3Ji6Dw-lkp@intel.com/config)
compiler: m68k-linux-gcc (GCC) 15.1.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250822/202508221736.qO3Ji6Dw-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202508221736.qO3Ji6Dw-lkp@intel.com/

All errors (new ones prefixed by >>):

   drivers/clocksource/timer-sse.c: In function 'sse_setup_clockevent':
>> drivers/clocksource/timer-sse.c:228:13: error: implicit declaration of function 'FIELD_GET' [-Wimplicit-function-declaration]
     228 |         if (FIELD_GET(CNTP_CFG_AIVAL_MASK, val) == CNTP_CFG_AIVAL_IMPL) {
         |             ^~~~~~~~~


vim +/FIELD_GET +228 drivers/clocksource/timer-sse.c

   211	
   212	static int sse_setup_clockevent(struct device *dev, struct sse_timer_frame *f,
   213					unsigned long rate)
   214	{
   215		int ret;
   216		u32 val = readl_relaxed(f->base + CNTP_CFG);
   217	
   218		f->ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
   219	
   220		f->ce.name = "sse-timer";
   221		f->ce.rating = 300;
   222		f->ce.irq = f->irq;
   223		f->ce.cpumask = cpu_possible_mask;
   224		f->ce.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_DYNIRQ;
   225		f->ce.set_state_shutdown = sse_ce_shutdown;
   226		f->ce.set_next_event = sse_ce_next_event;
   227		f->ce.set_state_oneshot_stopped = sse_ce_shutdown;
 > 228		if (FIELD_GET(CNTP_CFG_AIVAL_MASK, val) == CNTP_CFG_AIVAL_IMPL) {
   229			f->ce.set_state_periodic = sse_ce_set_periodic;
   230			f->ce.set_state_oneshot = sse_ce_set_oneshot;
   231		}
   232	
   233		clockevents_config_and_register(&f->ce, rate, 0xf, ULONG_MAX);
   234	
   235		ret = devm_request_irq(dev, f->irq, sse_timer_interrupt,
   236				       IRQF_TIMER | IRQF_NOBALANCING,
   237				       f->ce.name, f);
   238		if (ret) {
   239			dev_err(dev, "Unable to register interrupt\n");
   240			return ret;
   241		}
   242	
   243		return 0;
   244	}
   245	

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