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From: Rishikesh Donadkar <r-donadkar@ti.com>
To: <jai.luthra@linux.dev>, <laurent.pinchart@ideasonboard.com>,
	<mripard@kernel.org>
Cc: <r-donadkar@ti.com>, <y-abhilashchandra@ti.com>,
	<devarsht@ti.com>, <vaishnav.a@ti.com>, <s-jain1@ti.com>,
	<vigneshr@ti.com>, <mchehab@kernel.org>, <robh@kernel.org>,
	<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
	<sakari.ailus@linux.intel.com>, <hverkuil-cisco@xs4all.nl>,
	<tomi.valkeinen@ideasonboard.com>, <jai.luthra@ideasonboard.com>,
	<changhuang.liang@starfivetech.com>, <jack.zhu@starfivetech.com>,
	<linux-kernel@vger.kernel.org>, <linux-media@vger.kernel.org>,
	<devicetree@vger.kernel.org>
Subject: [PATCH v5 04/14] media: ti: j721e-csi2rx: prepare SHIM code for multiple contexts
Date: Mon, 25 Aug 2025 19:55:12 +0530	[thread overview]
Message-ID: <20250825142522.1826188-5-r-donadkar@ti.com> (raw)
In-Reply-To: <20250825142522.1826188-1-r-donadkar@ti.com>

From: Pratyush Yadav <p.yadav@ti.com>

Currently the SHIM code to configure the context only touches the first
context. Add support for writing to the context's registers based on the
context index.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Jai Luthra <j-luthra@ti.com>
Reviewed-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Signed-off-by: Rishikesh Donadkar <r-donadkar@ti.com>
---
 .../media/platform/ti/j721e-csi2rx/j721e-csi2rx.c  | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
index cb52bc7afd1f..50a935494e43 100644
--- a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
+++ b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
@@ -27,7 +27,7 @@
 #define SHIM_CNTL			0x10
 #define SHIM_CNTL_PIX_RST		BIT(0)
 
-#define SHIM_DMACNTX			0x20
+#define SHIM_DMACNTX(i)			(0x20 + ((i) * 0x20))
 #define SHIM_DMACNTX_EN			BIT(31)
 #define SHIM_DMACNTX_YUV422		GENMASK(27, 26)
 #define SHIM_DMACNTX_DUAL_PCK_CFG	BIT(24)
@@ -38,7 +38,7 @@
 #define SHIM_DMACNTX_SIZE_16		1
 #define SHIM_DMACNTX_SIZE_32		2
 
-#define SHIM_PSI_CFG0			0x24
+#define SHIM_PSI_CFG0(i)		(0x24 + ((i) * 0x20))
 #define SHIM_PSI_CFG0_SRC_TAG		GENMASK(15, 0)
 #define SHIM_PSI_CFG0_DST_TAG		GENMASK(31, 16)
 
@@ -573,11 +573,13 @@ static void ti_csi2rx_setup_shim(struct ti_csi2rx_ctx *ctx)
 		break;
 	}
 
-	writel(reg, csi->shim + SHIM_DMACNTX);
+	reg |= FIELD_PREP(SHIM_DMACNTX_SIZE, fmt->size);
+
+	writel(reg, csi->shim + SHIM_DMACNTX(ctx->idx));
 
 	reg = FIELD_PREP(SHIM_PSI_CFG0_SRC_TAG, 0) |
 	      FIELD_PREP(SHIM_PSI_CFG0_DST_TAG, 0);
-	writel(reg, csi->shim + SHIM_PSI_CFG0);
+	writel(reg, csi->shim + SHIM_PSI_CFG0(ctx->idx));
 }
 
 static void ti_csi2rx_drain_callback(void *param)
@@ -894,7 +896,7 @@ static int ti_csi2rx_start_streaming(struct vb2_queue *vq, unsigned int count)
 err_pipeline:
 	video_device_pipeline_stop(&ctx->vdev);
 	writel(0, csi->shim + SHIM_CNTL);
-	writel(0, csi->shim + SHIM_DMACNTX);
+	writel(0, csi->shim + SHIM_DMACNTX(ctx->idx));
 err:
 	ti_csi2rx_cleanup_buffers(ctx, VB2_BUF_STATE_QUEUED);
 	return ret;
@@ -909,7 +911,7 @@ static void ti_csi2rx_stop_streaming(struct vb2_queue *vq)
 	video_device_pipeline_stop(&ctx->vdev);
 
 	writel(0, csi->shim + SHIM_CNTL);
-	writel(0, csi->shim + SHIM_DMACNTX);
+	writel(0, csi->shim + SHIM_DMACNTX(ctx->idx));
 
 	ret = v4l2_subdev_call(csi->source, video, s_stream, 0);
 	if (ret)
-- 
2.34.1


  parent reply	other threads:[~2025-08-25 14:26 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-25 14:25 [PATCH v5 00/14] media: cadence,ti: CSI2RX Multistream Support Rishikesh Donadkar
2025-08-25 14:25 ` [PATCH v5 01/14] media: ti: j721e-csi2rx: Remove word size alignment on frame width Rishikesh Donadkar
2025-08-25 14:25 ` [PATCH v5 02/14] dt-bindings: media: ti,j721e-csi2rx-shim: Support 32 dma chans Rishikesh Donadkar
2025-08-25 14:25 ` [PATCH v5 03/14] media: ti: j721e-csi2rx: separate out device and context Rishikesh Donadkar
2025-08-25 14:25 ` Rishikesh Donadkar [this message]
2025-08-25 14:25 ` [PATCH v5 05/14] media: ti: j721e-csi2rx: allocate DMA channel based on context index Rishikesh Donadkar
2025-08-25 14:25 ` [PATCH v5 06/14] media: ti: j721e-csi2rx: add a subdev for the core device Rishikesh Donadkar
2025-08-25 14:25 ` [PATCH v5 07/14] media: ti: j721e-csi2rx: get number of contexts from device tree Rishikesh Donadkar
2025-08-28 11:11   ` Jai Luthra
2025-08-25 14:25 ` [PATCH v5 08/14] media: cadence: csi2rx: add get_frame_desc wrapper Rishikesh Donadkar
2025-08-25 14:25 ` [PATCH v5 09/14] media: ti: j721e-csi2rx: add support for processing virtual channels Rishikesh Donadkar
2025-08-28 11:13   ` Jai Luthra
2025-08-25 14:25 ` [PATCH v5 10/14] media: cadence: csi2rx: add multistream support Rishikesh Donadkar
2025-08-25 14:25 ` [PATCH v5 11/14] media: ti: j721e-csi2rx: " Rishikesh Donadkar
2025-08-25 14:25 ` [PATCH v5 12/14] media: ti: j721e-csi2rx: Submit all available buffers Rishikesh Donadkar
2025-08-25 14:25 ` [PATCH v5 13/14] media: ti: j721e-csi2rx: Change the drain architecture for multistream Rishikesh Donadkar
2025-08-25 14:25 ` [PATCH v5 14/14] media: ti: j721e-csi2rx: Wait for the last drain completion Rishikesh Donadkar

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