From: Fenglin Wu via B4 Relay <devnull+fenglin.wu.oss.qualcomm.com@kernel.org>
To: Sebastian Reichel <sre@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heikki Krogerus <heikki.krogerus@linux.intel.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Cc: "Subbaraman Narayanamurthy"
<subbaraman.narayanamurthy@oss.qualcomm.com>,
"David Collins" <david.collins@oss.qualcomm.com>,
"György Kurucz" <me@kuruczgy.com>,
linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-msm@vger.kernel.org, kernel@oss.qualcomm.com,
devicetree@vger.kernel.org, linux-usb@vger.kernel.org,
"Fenglin Wu" <fenglin.wu@oss.qualcomm.com>
Subject: [PATCH v3 6/8] dt-bindings: soc: qcom,pmic-glink: Add charge limit nvmem properties
Date: Tue, 26 Aug 2025 15:18:33 +0800 [thread overview]
Message-ID: <20250826-qcom_battmgr_update-v3-6-74ea410ef146@oss.qualcomm.com> (raw)
In-Reply-To: <20250826-qcom_battmgr_update-v3-0-74ea410ef146@oss.qualcomm.com>
From: Fenglin Wu <fenglin.wu@oss.qualcomm.com>
Add nvmem properties to retrieve charge control configurations
from the PMIC SDAM registers.
Signed-off-by: Fenglin Wu <fenglin.wu@oss.qualcomm.com>
---
.../devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
index 4c9e78f29523e3d77aacb4299f64ab96f9b1a831..9d6db4825da389aa14d77f653d2f8a3442e22162 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
@@ -55,6 +55,20 @@ properties:
The array should contain a gpio entry for each PMIC Glink connector, in reg order.
It is defined that GPIO active level means "CC2" or Reversed/Flipped orientation.
+ nvmem-cells:
+ minItems: 3
+ maxItems: 3
+ description:
+ The nvmem cells contain the charge control settings, including the charge control
+ enable status, the battery state of charge (SoC) threshold for stopping charging,
+ and the battery SoC delta required to restart charging.
+
+ nvmem-cell-names:
+ items:
+ - const: charge_limit_en
+ - const: charge_limit_end
+ - const: charge_limit_delta
+
patternProperties:
'^connector@\d$':
$ref: /schemas/connector/usb-connector.yaml#
--
2.34.1
next prev parent reply other threads:[~2025-08-26 7:18 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-26 7:18 [PATCH v3 0/8] power: supply: Add several features support in qcom-battmgr driver Fenglin Wu via B4 Relay
2025-08-26 7:18 ` [PATCH v3 1/8] power: supply: core: Add resistance power supply property Fenglin Wu via B4 Relay
2025-08-26 7:18 ` [PATCH v3 2/8] power: supply: core: Add state_of_health " Fenglin Wu via B4 Relay
2025-08-26 7:18 ` [PATCH v3 3/8] power: supply: qcom_battmgr: Add resistance " Fenglin Wu via B4 Relay
2025-08-26 7:18 ` [PATCH v3 4/8] power: supply: qcom_battmgr: Add state_of_health property Fenglin Wu via B4 Relay
2025-08-26 7:18 ` [PATCH v3 5/8] power: supply: qcom_battmgr: update compats for SM8550 and X1E80100 Fenglin Wu via B4 Relay
2025-08-26 7:18 ` Fenglin Wu via B4 Relay [this message]
2025-09-01 20:05 ` [PATCH v3 6/8] dt-bindings: soc: qcom,pmic-glink: Add charge limit nvmem properties Rob Herring (Arm)
2025-08-26 7:18 ` [PATCH v3 7/8] power: supply: qcom_battmgr: Add charge control support Fenglin Wu via B4 Relay
2025-09-03 8:29 ` Neil Armstrong
2025-08-26 7:18 ` [PATCH v3 8/8] arm64: dts: qcom: x1e80100-crd: Add charge limit nvmem Fenglin Wu via B4 Relay
2025-09-03 8:41 ` Maud Spierings
2025-09-03 8:57 ` [PATCH v3 0/8] power: supply: Add several features support in qcom-battmgr driver Neil Armstrong
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