From: Pincheng Wang <pincheng.plct@isrc.iscas.ac.cn>
To: paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, alex@ghiti.fr, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, anup@brainfault.org,
pbonzini@redhat.com, shuah@kernel.org, cyan.yang@sifive.com,
cleger@rivosinc.com, charlie@rivosinc.com,
cuiyunhui@bytedance.com, samuel.holland@sifive.com,
namcao@linutronix.de, jesse@rivosinc.com, inochiama@gmail.com,
yongxuan.wang@sifive.com, ajones@ventanamicro.com,
parri.andrea@gmail.com, mikisabate@gmail.com,
yikming2222@gmail.com, thomas.weissschuh@linutronix.de
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, devicetree@vger.kernel.org,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-kselftest@vger.kernel.org, pincheng.plct@isrc.iscas.ac.cn
Subject: [PATCH v2 5/5] KVM: riscv: selftests: add Zilsd and Zclsd extension to get-reg-list test
Date: Wed, 27 Aug 2025 00:29:39 +0800 [thread overview]
Message-ID: <20250826162939.1494021-6-pincheng.plct@isrc.iscas.ac.cn> (raw)
In-Reply-To: <20250826162939.1494021-1-pincheng.plct@isrc.iscas.ac.cn>
The KVM RISC-V allows Zilsd and Zclsd extensions for Guest/VM so add
this extension to get-reg-list test.
Signed-off-by: Pincheng Wang <pincheng.plct@isrc.iscas.ac.cn>
---
tools/testing/selftests/kvm/riscv/get-reg-list.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
index a0b7dabb5040..477bd386265f 100644
--- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
+++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
@@ -78,7 +78,9 @@ bool filter_reg(__u64 reg)
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCB:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCD:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCF:
+ case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCLSD:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCMOP:
+ case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZILSD:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFA:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFH:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFHMIN:
@@ -530,7 +532,9 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
KVM_ISA_EXT_ARR(ZCB),
KVM_ISA_EXT_ARR(ZCD),
KVM_ISA_EXT_ARR(ZCF),
+ KVM_ISA_EXT_ARR(ZCLSD),
KVM_ISA_EXT_ARR(ZCMOP),
+ KVM_ISA_EXT_ARR(ZILSD),
KVM_ISA_EXT_ARR(ZFA),
KVM_ISA_EXT_ARR(ZFH),
KVM_ISA_EXT_ARR(ZFHMIN),
@@ -1199,7 +1203,9 @@ struct vcpu_reg_list *vcpu_configs[] = {
&config_zcb,
&config_zcd,
&config_zcf,
+ &config_zclsd,
&config_zcmop,
+ &config_zilsd,
&config_zfa,
&config_zfh,
&config_zfhmin,
--
2.39.5
next prev parent reply other threads:[~2025-08-26 16:30 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-26 16:29 [PATCH v2 0/5] Add Zilsd/Zclsd support in hwprobe and KVM Pincheng Wang
2025-08-26 16:29 ` [PATCH v2 1/5] dt-bindings: riscv: add Zilsd and Zclsd extension descriptions Pincheng Wang
2025-08-26 17:39 ` Conor Dooley
2025-09-01 8:46 ` Nutty.Liu
2025-08-26 16:29 ` [PATCH v2 2/5] riscv: add ISA extension parsing for Zilsd and Zclsd Pincheng Wang
2025-09-01 8:41 ` Nutty.Liu
2025-08-26 16:29 ` [PATCH v2 3/5] riscv: hwprobe: export Zilsd and Zclsd ISA extensions Pincheng Wang
2025-09-01 8:39 ` Nutty.Liu
2025-08-26 16:29 ` [PATCH v2 4/5] riscv: KVM: allow Zilsd and Zclsd extensions for Guest/VM Pincheng Wang
2025-09-01 8:37 ` Nutty.Liu
2025-08-26 16:29 ` Pincheng Wang [this message]
2025-09-01 8:37 ` [PATCH v2 5/5] KVM: riscv: selftests: add Zilsd and Zclsd extension to get-reg-list test Nutty.Liu
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