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[2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-55f678452e1sm143807e87.85.2025.08.28.15.48.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Aug 2025 15:48:32 -0700 (PDT) From: Dmitry Baryshkov Date: Fri, 29 Aug 2025 01:48:20 +0300 Subject: [PATCH v7 7/9] dt-bindings: display/msm: expand to support MST Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250829-dp_mst_bindings-v7-7-2b268a43917b@oss.qualcomm.com> References: <20250829-dp_mst_bindings-v7-0-2b268a43917b@oss.qualcomm.com> In-Reply-To: <20250829-dp_mst_bindings-v7-0-2b268a43917b@oss.qualcomm.com> To: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kuogee Hsieh , Abel Vesa , Mahadevan , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Abhinav Kumar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=14870; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=C2VsL6/7386lEMyPGm3O80Fg6Ts6b/RJXYqdb7O+DBw=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBosNyxInvewydByX657ZIdq5YnisT50x/iMvVoR 6vtA+85z4mJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCaLDcsQAKCRCLPIo+Aiko 1el3B/4+gw71d+6H6vzQlsJHjRbJ6xmik/0xR5d9Bj9fWRC7xbHwKuxz/fiP1iceYFVjj+g4qUH 8z4fnn7gaWzTp42H+kSB7xqcuHEVmUXUhtnLKiCOsyoi3E7Gm2eyMWoxLcSj7AffVEvHBPdVKQM HmgD9kv8zH/Gtbs6errqaCRlEeNHWu349dOiNdM9b8iDpuRh+Pb8mrQ6KHcMd5E0ohhrlQSSdeN AZ3Y+ddwE65V+RtIGjLQGiEncfeNUUDl2TX7yX9gX2llZS4juWXe0XbOvaITGXdUYt5Dg/m8FDb 48LXjUC1LjEoldlYPbbgxmmOdnjdnDLRO7FsIMhTUh7jFSks X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-GUID: rVMCn-DNXfbtc_XdUBhTIFUhtreb4kQB X-Proofpoint-ORIG-GUID: rVMCn-DNXfbtc_XdUBhTIFUhtreb4kQB X-Authority-Analysis: v=2.4 cv=JJo7s9Kb c=1 sm=1 tr=0 ts=68b0dcc3 cx=c_pps a=UgVkIMxJMSkC9lv97toC5g==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=uRafYTt1GBQvBzODlV0A:9 a=QEXdDO2ut3YA:10 a=1HOtulTD9v-eNWfpl4qZ:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODIzMDAzMSBTYWx0ZWRfX6LHOV3LbzGrM A2qDgJKNBskSv3ymHQu0fjmLD8aL0Jcka436ZSKHmPlwnK0wJNDbQoGU40aXIMUWayyrNzz3dKw 2XEp62t6N4X2mLeXSEfzFG5tTKdd6eiX2nxo4WsxdhkgUKjxyJNKGwuF+5KZdycTFR6UHfAAotk y2ZVezerqptZiJU96fP2UcSAp7gY/Wd+MBi8fJk2qnjnunvbC8CIBwWraaWnEjFTIrSZrKlDTof 8aYIRxAmWb19NgWJcGBWTOAr47r8bJnrOGsi4FL++eHLMS/NRJ9EBeVyueokxfgeMpd/UWHXHWX ri9ZF/Kro6hvq3YtgbS0K+OB/OqqZJIdEkk4QnvUDqjoXMetO74KmqTLYQpzIxt4WeHs3wKRUMC n4x8SGCN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-28_04,2025-08-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 bulkscore=0 spamscore=0 impostorscore=0 malwarescore=0 clxscore=1015 priorityscore=1501 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508230031 From: Abhinav Kumar On a vast majority of Qualcomm chipsets DisplayPort controller can support several MST streams (up to 4x). To support MST these chipsets use up to 4 stream pixel clocks for the DisplayPort controller and several extra register regions. Expand corresponding region and clock bindings for these platforms and fix example schema files to follow updated bindings. Note: On chipsets that support MST, the number of streams supported can vary between controllers. For example, SA8775P supports 4 MST streams on mdss_dp0 but only 2 streams on mdss_dp1. Signed-off-by: Abhinav Kumar Signed-off-by: Jessica Zhang Signed-off-by: Dmitry Baryshkov --- .../bindings/display/msm/dp-controller.yaml | 91 +++++++++++++++++++++- .../bindings/display/msm/qcom,sa8775p-mdss.yaml | 26 +++++-- .../bindings/display/msm/qcom,sar2130p-mdss.yaml | 10 ++- .../bindings/display/msm/qcom,sc7280-mdss.yaml | 3 +- .../bindings/display/msm/qcom,sm7150-mdss.yaml | 10 ++- .../bindings/display/msm/qcom,sm8750-mdss.yaml | 10 ++- .../bindings/display/msm/qcom,x1e80100-mdss.yaml | 10 ++- 7 files changed, 138 insertions(+), 22 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index afe01332d66c3c2e6e5848ce3d864079ce71f3cd..8282f3ca45c8b18f159670a7d8c4d9515cdb62ca 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -66,25 +66,37 @@ properties: - description: link register block - description: p0 register block - description: p1 register block + - description: p2 register block + - description: p3 register block + - description: mst2link register block + - description: mst3link register block interrupts: maxItems: 1 clocks: + minItems: 5 items: - description: AHB clock to enable register access - description: Display Port AUX clock - description: Display Port Link clock - description: Link interface clock between DP and PHY - - description: Display Port Pixel clock + - description: Display Port stream 0 Pixel clock + - description: Display Port stream 1 Pixel clock + - description: Display Port stream 2 Pixel clock + - description: Display Port stream 3 Pixel clock clock-names: + minItems: 5 items: - const: core_iface - const: core_aux - const: ctrl_link - const: ctrl_link_iface - const: stream_pixel + - const: stream_1_pixel + - const: stream_2_pixel + - const: stream_3_pixel phys: maxItems: 1 @@ -166,7 +178,6 @@ required: allOf: # AUX BUS does not exist on DP controllers # Audio output also is present only on DP output - # p1 regions is present on DP, but not on eDP - if: properties: compatible: @@ -195,11 +206,83 @@ allOf: else: properties: aux-bus: false - reg: - minItems: 5 required: - "#sound-dai-cells" + - if: + properties: + compatible: + contains: + enum: + # these platforms support SST only + - qcom,sc7180-dp + - qcom,sc7280-dp + - qcom,sc7280-edp + - qcom,sc8180x-edp + - qcom,sc8280xp-edp + then: + properties: + reg: + minItems: 5 + maxItems: 5 + clocks: + minItems: 5 + maxItems: 5 + + - if: + properties: + compatible: + contains: + enum: + # these platforms support 2 streams MST on some interfaces, + # others are SST only + - qcom,sc8280xp-dp + - qcom,x1e80100-dp + then: + properties: + reg: + minItems: 5 + maxItems: 5 + clocks: + minItems: 5 + maxItems: 6 + + - if: + properties: + compatible: + contains: + # 2 streams MST + enum: + - qcom,sc8180x-dp + - qcom,sdm845-dp + - qcom,sm8350-dp + - qcom,sm8650-dp + then: + properties: + reg: + minItems: 5 + maxItems: 5 + clocks: + minItems: 6 + maxItems: 6 + + - if: + properties: + compatible: + contains: + enum: + # these platforms support 4 stream MST on first DP, + # 2 streams MST on the second one. + - qcom,sa8775p-dp + then: + properties: + reg: + minItems: 9 + maxItems: 9 + clocks: + minItems: 6 + maxItems: 8 + additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml index 1053b3bc49086185d17c7c18d56fb4caf98c2eda..e2730a2f25cfb0496f47ad9f3f9cbf69b1d4649f 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml @@ -375,7 +375,11 @@ examples: <0xaf54200 0x0c0>, <0xaf55000 0x770>, <0xaf56000 0x09c>, - <0xaf57000 0x09c>; + <0xaf57000 0x09c>, + <0xaf58000 0x09c>, + <0xaf59000 0x09c>, + <0xaf5a000 0x23c>, + <0xaf5b000 0x23c>; interrupt-parent = <&mdss0>; interrupts = <12>; @@ -384,16 +388,28 @@ examples: <&dispcc_dptx0_aux_clk>, <&dispcc_dptx0_link_clk>, <&dispcc_dptx0_link_intf_clk>, - <&dispcc_dptx0_pixel0_clk>; + <&dispcc_dptx0_pixel0_clk>, + <&dispcc_dptx0_pixel1_clk>, + <&dispcc_dptx0_pixel2_clk>, + <&dispcc_dptx0_pixel3_clk>; clock-names = "core_iface", "core_aux", "ctrl_link", "ctrl_link_iface", - "stream_pixel"; + "stream_pixel", + "stream_1_pixel", + "stream_2_pixel", + "stream_3_pixel"; assigned-clocks = <&dispcc_mdss_dptx0_link_clk_src>, - <&dispcc_mdss_dptx0_pixel0_clk_src>; - assigned-clock-parents = <&mdss0_dp0_phy 0>, <&mdss0_dp0_phy 1>; + <&dispcc_mdss_dptx0_pixel0_clk_src>, + <&dispcc_mdss_dptx0_pixel1_clk_src>, + <&dispcc_mdss_dptx0_pixel2_clk_src>, + <&dispcc_mdss_dptx0_pixel3_clk_src>; + assigned-clock-parents = <&mdss0_dp0_phy 0>, + <&mdss0_dp0_phy 1>, + <&mdss0_dp0_phy 1>, + <&mdss0_dp0_phy 1>; phys = <&mdss0_dp0_phy>; phy-names = "dp"; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml index 870144b53cec9d3e0892276e14b49b745d021879..44c1bb9e41094197b2a6855c0d992fda8c1240a4 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml @@ -207,16 +207,20 @@ examples: <&dispcc_disp_cc_mdss_dptx0_aux_clk>, <&dispcc_disp_cc_mdss_dptx0_link_clk>, <&dispcc_disp_cc_mdss_dptx0_link_intf_clk>, - <&dispcc_disp_cc_mdss_dptx0_pixel0_clk>; + <&dispcc_disp_cc_mdss_dptx0_pixel0_clk>, + <&dispcc_disp_cc_mdss_dptx0_pixel1_clk>; clock-names = "core_iface", "core_aux", "ctrl_link", "ctrl_link_iface", - "stream_pixel"; + "stream_pixel", + "stream_1_pixel"; assigned-clocks = <&dispcc_disp_cc_mdss_dptx0_link_clk_src>, - <&dispcc_disp_cc_mdss_dptx0_pixel0_clk_src>; + <&dispcc_disp_cc_mdss_dptx0_pixel0_clk_src>, + <&dispcc_disp_cc_mdss_dptx0_pixel1_clk_src>; assigned-clock-parents = <&usb_dp_qmpphy_QMP_USB43DP_DP_LINK_CLK>, + <&usb_dp_qmpphy_QMP_USB43DP_DP_VCO_DIV_CLK>, <&usb_dp_qmpphy_QMP_USB43DP_DP_VCO_DIV_CLK>; phys = <&usb_dp_qmpphy QMP_USB43DP_DP_PHY>; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml index 2947f27e0585216ca0e1eab6a79afcb21323b201..b643d3adf66947095490b51625a03635c64c37c2 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml @@ -281,7 +281,8 @@ examples: reg = <0xaea0000 0x200>, <0xaea0200 0x200>, <0xaea0400 0xc00>, - <0xaea1000 0x400>; + <0xaea1000 0x400>, + <0xaea1400 0x400>; interrupt-parent = <&mdss>; interrupts = <14>; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml index c5d209019124da3127285f61bf5a27d346a3d8a1..9b0621d88d508fb441f004261c42c2473bea2bcb 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml @@ -394,16 +394,20 @@ examples: <&dispcc_mdss_dp_aux_clk>, <&dispcc_mdss_dp_link_clk>, <&dispcc_mdss_dp_link_intf_clk>, - <&dispcc_mdss_dp_pixel_clk>; + <&dispcc_mdss_dp_pixel_clk>, + <&dispcc_mdss_dp_pixel1_clk>; clock-names = "core_iface", "core_aux", "ctrl_link", "ctrl_link_iface", - "stream_pixel"; + "stream_pixel", + "stream_1_pixel"; assigned-clocks = <&dispcc_mdss_dp_link_clk_src>, - <&dispcc_mdss_dp_pixel_clk_src>; + <&dispcc_mdss_dp_pixel_clk_src>, + <&dispcc_mdss_dp_pixel1_clk_src>; assigned-clock-parents = <&dp_phy 0>, + <&dp_phy 1>, <&dp_phy 1>; operating-points-v2 = <&dp_opp_table>; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml index 72c70edc1fb01c61f8aad24fdb58bfb4f62a6e34..4151f475f3bc36a584493722db207a3dd5f96eed 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml @@ -401,16 +401,20 @@ examples: <&disp_cc_mdss_dptx0_aux_clk>, <&disp_cc_mdss_dptx0_link_clk>, <&disp_cc_mdss_dptx0_link_intf_clk>, - <&disp_cc_mdss_dptx0_pixel0_clk>; + <&disp_cc_mdss_dptx0_pixel0_clk>, + <&disp_cc_mdss_dptx0_pixel1_clk>; clock-names = "core_iface", "core_aux", "ctrl_link", "ctrl_link_iface", - "stream_pixel"; + "stream_pixel", + "stream_1_pixel"; assigned-clocks = <&disp_cc_mdss_dptx0_link_clk_src>, - <&disp_cc_mdss_dptx0_pixel0_clk_src>; + <&disp_cc_mdss_dptx0_pixel0_clk_src>, + <&disp_cc_mdss_dptx0_pixel1_clk_src>; assigned-clock-parents = <&usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>, <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; operating-points-v2 = <&dp_opp_table>; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml index e35230a864379c195600ff67820d6a39b6f73ef4..8d698a2e055a88b6485606d9708e488e6bc82341 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml @@ -183,15 +183,19 @@ examples: <&dispcc_dptx0_aux_clk>, <&dispcc_dptx0_link_clk>, <&dispcc_dptx0_link_intf_clk>, - <&dispcc_dptx0_pixel0_clk>; + <&dispcc_dptx0_pixel0_clk>, + <&dispcc_dptx0_pixel1_clk>; clock-names = "core_iface", "core_aux", "ctrl_link", "ctrl_link_iface", - "stream_pixel"; + "stream_pixel", + "stream_1_pixel"; assigned-clocks = <&dispcc_mdss_dptx0_link_clk_src>, - <&dispcc_mdss_dptx0_pixel0_clk_src>; + <&dispcc_mdss_dptx0_pixel0_clk_src>, + <&dispcc_mdss_dptx0_pixel1_clk_src>; assigned-clock-parents = <&usb_1_ss0_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_ss0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>, <&usb_1_ss0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; operating-points-v2 = <&mdss_dp0_opp_table>; -- 2.47.2