* [PATCH v3 1/4] dt-bindings: clock: marvell,pxa1908: Add syscon compatible to apmu
2025-08-29 16:21 [PATCH v3 0/4] Marvell PXA1908 power domains Duje Mihanović
@ 2025-08-29 16:21 ` Duje Mihanović
2025-08-29 16:21 ` [PATCH v3 2/4] pmdomain: marvell: Add PXA1908 power domains Duje Mihanović
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Duje Mihanović @ 2025-08-29 16:21 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Ulf Hansson
Cc: David Wronek, Karel Balej, phone-devel, ~postmarketos/upstreaming,
linux-arm-kernel, linux-clk, devicetree, linux-kernel, linux-pm,
Duje Mihanović
Add required syscon compatible and #power-domain-cells to the APMU
controller. This is required for the SoC's power domain controller as
the registers are shared.
Device tree bindings for said power domains are also added.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
v3:
- Squash power binding patch
- Update trailers
v2:
- Drop simple-mfd
- Add #power-domain-cells
---
.../devicetree/bindings/clock/marvell,pxa1908.yaml | 30 +++++++++++++++++-----
MAINTAINERS | 1 +
include/dt-bindings/power/marvell,pxa1908-power.h | 17 ++++++++++++
3 files changed, 42 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml b/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml
index 4e78933232b6b925811425f853bedf6e9f01a27d..6f3a8578fe2a6810911fec5879c07c9ddb34565a 100644
--- a/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml
+++ b/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml
@@ -19,11 +19,14 @@ description: |
properties:
compatible:
- enum:
- - marvell,pxa1908-apbc
- - marvell,pxa1908-apbcp
- - marvell,pxa1908-mpmu
- - marvell,pxa1908-apmu
+ oneOf:
+ - enum:
+ - marvell,pxa1908-apbc
+ - marvell,pxa1908-apbcp
+ - marvell,pxa1908-mpmu
+ - items:
+ - const: marvell,pxa1908-apmu
+ - const: syscon
reg:
maxItems: 1
@@ -31,6 +34,9 @@ properties:
'#clock-cells':
const: 1
+ '#power-domain-cells':
+ const: 1
+
required:
- compatible
- reg
@@ -38,11 +44,23 @@ required:
additionalProperties: false
+if:
+ not:
+ properties:
+ compatible:
+ contains:
+ const: marvell,pxa1908-apmu
+
+then:
+ properties:
+ '#power-domain-cells': false
+
examples:
# APMU block:
- |
clock-controller@d4282800 {
- compatible = "marvell,pxa1908-apmu";
+ compatible = "marvell,pxa1908-apmu", "syscon";
reg = <0xd4282800 0x400>;
#clock-cells = <1>;
+ #power-domain-cells = <1>;
};
diff --git a/MAINTAINERS b/MAINTAINERS
index fed6cd812d796a08cebc0c1fd540c8901d1bf448..88f7bd50686eb1f6bcd4f34c6827f27ad44ea4e8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2872,6 +2872,7 @@ S: Maintained
F: arch/arm64/boot/dts/marvell/mmp/
F: drivers/clk/mmp/clk-pxa1908*.c
F: include/dt-bindings/clock/marvell,pxa1908.h
+F: include/dt-bindings/power/marvell,pxa1908-power.h
ARM/Mediatek RTC DRIVER
M: Eddie Huang <eddie.huang@mediatek.com>
diff --git a/include/dt-bindings/power/marvell,pxa1908-power.h b/include/dt-bindings/power/marvell,pxa1908-power.h
new file mode 100644
index 0000000000000000000000000000000000000000..19b088351af138823505a774ff27203429fe2d97
--- /dev/null
+++ b/include/dt-bindings/power/marvell,pxa1908-power.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * Marvell PXA1908 power domains
+ *
+ * Copyright 2025, Duje Mihanović <duje@dujemihanovic.xyz>
+ */
+
+#ifndef __DTS_MARVELL_PXA1908_POWER_H
+#define __DTS_MARVELL_PXA1908_POWER_H
+
+#define PXA1908_POWER_DOMAIN_VPU 0
+#define PXA1908_POWER_DOMAIN_GPU 1
+#define PXA1908_POWER_DOMAIN_GPU2D 2
+#define PXA1908_POWER_DOMAIN_DSI 3
+#define PXA1908_POWER_DOMAIN_ISP 4
+
+#endif
--
2.51.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v3 2/4] pmdomain: marvell: Add PXA1908 power domains
2025-08-29 16:21 [PATCH v3 0/4] Marvell PXA1908 power domains Duje Mihanović
2025-08-29 16:21 ` [PATCH v3 1/4] dt-bindings: clock: marvell,pxa1908: Add syscon compatible to apmu Duje Mihanović
@ 2025-08-29 16:21 ` Duje Mihanović
2025-08-29 16:21 ` [PATCH v3 3/4] clk: mmp: pxa1908: Instantiate power driver through auxiliary bus Duje Mihanović
2025-08-29 16:21 ` [PATCH v3 4/4] arm64: dts: marvell: pxa1908: Add power domains Duje Mihanović
3 siblings, 0 replies; 5+ messages in thread
From: Duje Mihanović @ 2025-08-29 16:21 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Ulf Hansson
Cc: David Wronek, Karel Balej, phone-devel, ~postmarketos/upstreaming,
linux-arm-kernel, linux-clk, devicetree, linux-kernel, linux-pm,
Duje Mihanović
Marvell's PXA1908 SoC has a few power domains for its VPU, GPU, image
processor and DSI PHY. Add a driver to control these.
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
v3:
- Move driver back to pmdomain subsystem, use auxiliary bus to
instantiate the driver
- Drop redundant 'struct device' pointer in 'struct pxa1908_pd'
- Fix pxa1908_pd_is_on() for DSI domain
- Replace usleep_range() with fsleep()
- Use dev_err_probe() where sensible
v2:
- Move to clk subsystem, instantiate the driver from the APMU clock
driver
- Drop clock handling
- Squash MAINTAINERS patch
---
MAINTAINERS | 1 +
drivers/pmdomain/Kconfig | 1 +
drivers/pmdomain/Makefile | 1 +
drivers/pmdomain/marvell/Kconfig | 18 ++
drivers/pmdomain/marvell/Makefile | 3 +
.../pmdomain/marvell/pxa1908-power-controller.c | 268 +++++++++++++++++++++
6 files changed, 292 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 88f7bd50686eb1f6bcd4f34c6827f27ad44ea4e8..34e5e218e83e0ed9882b111f5251601dd6549d4e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2871,6 +2871,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm64/boot/dts/marvell/mmp/
F: drivers/clk/mmp/clk-pxa1908*.c
+F: drivers/pmdomain/marvell/
F: include/dt-bindings/clock/marvell,pxa1908.h
F: include/dt-bindings/power/marvell,pxa1908-power.h
diff --git a/drivers/pmdomain/Kconfig b/drivers/pmdomain/Kconfig
index 91f04ace35d4b024fafdf6af4e26a179640eb82f..23076ae90e6641dea8e5dbc851d041cd7929cee6 100644
--- a/drivers/pmdomain/Kconfig
+++ b/drivers/pmdomain/Kconfig
@@ -7,6 +7,7 @@ source "drivers/pmdomain/apple/Kconfig"
source "drivers/pmdomain/arm/Kconfig"
source "drivers/pmdomain/bcm/Kconfig"
source "drivers/pmdomain/imx/Kconfig"
+source "drivers/pmdomain/marvell/Kconfig"
source "drivers/pmdomain/mediatek/Kconfig"
source "drivers/pmdomain/qcom/Kconfig"
source "drivers/pmdomain/renesas/Kconfig"
diff --git a/drivers/pmdomain/Makefile b/drivers/pmdomain/Makefile
index 7030f44a49df9e91b1c9d1b6d12690a6248671fb..ebc802f13eb953db750f5a9507caa64c637a957a 100644
--- a/drivers/pmdomain/Makefile
+++ b/drivers/pmdomain/Makefile
@@ -5,6 +5,7 @@ obj-y += apple/
obj-y += arm/
obj-y += bcm/
obj-y += imx/
+obj-y += marvell/
obj-y += mediatek/
obj-y += qcom/
obj-y += renesas/
diff --git a/drivers/pmdomain/marvell/Kconfig b/drivers/pmdomain/marvell/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..6c4084c826670266b7d948438f6e6d76acb416e2
--- /dev/null
+++ b/drivers/pmdomain/marvell/Kconfig
@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+menu "Marvell PM Domains"
+ depends on ARCH_MMP || COMPILE_TEST
+
+config PXA1908_PM_DOMAINS
+ tristate "Marvell PXA1908 power domains"
+ depends on OF
+ depends on PM
+ default y if ARCH_MMP && ARM64
+ select AUXILIARY_BUS
+ select MFD_SYSCON
+ select PM_GENERIC_DOMAINS
+ select PM_GENERIC_DOMAINS_OF
+ help
+ Say Y here to enable support for Marvell PXA1908's power domanis.
+
+endmenu
diff --git a/drivers/pmdomain/marvell/Makefile b/drivers/pmdomain/marvell/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..22c25013f6c856a2ca01a121e830279ee88eb0ed
--- /dev/null
+++ b/drivers/pmdomain/marvell/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+obj-$(CONFIG_PXA1908_PM_DOMAINS) += pxa1908-power-controller.o
diff --git a/drivers/pmdomain/marvell/pxa1908-power-controller.c b/drivers/pmdomain/marvell/pxa1908-power-controller.c
new file mode 100644
index 0000000000000000000000000000000000000000..29134629861abcf46959f9dcc98d3f05a4cc5b72
--- /dev/null
+++ b/drivers/pmdomain/marvell/pxa1908-power-controller.c
@@ -0,0 +1,268 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2025 Duje Mihanović <duje@dujemihanovic.xyz>
+ */
+
+#include <linux/auxiliary_bus.h>
+#include <linux/container_of.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/mfd/syscon.h>
+#include <linux/mod_devicetable.h>
+#include <linux/platform_device.h>
+#include <linux/pm_domain.h>
+#include <linux/regmap.h>
+#include <linux/units.h>
+
+#include <dt-bindings/power/marvell,pxa1908-power.h>
+
+/* VPU, GPU, ISP */
+#define APMU_PWR_CTRL_REG 0xd8
+#define APMU_PWR_BLK_TMR_REG 0xdc
+#define APMU_PWR_STATUS_REG 0xf0
+
+/* DSI */
+#define APMU_DEBUG 0x88
+#define DSI_PHY_DVM_MASK BIT(31)
+
+#define POWER_ON_LATENCY_US 300
+#define POWER_OFF_LATENCY_US 20
+
+#define NR_DOMAINS 5
+
+struct pxa1908_pd_ctrl {
+ struct generic_pm_domain *domains[NR_DOMAINS];
+ struct genpd_onecell_data onecell_data;
+ struct regmap *base;
+};
+
+struct pxa1908_pd_data {
+ u32 reg_clk_res_ctrl;
+ u32 pwr_state;
+ u32 hw_mode;
+ bool keep_on;
+ int id;
+};
+
+struct pxa1908_pd {
+ const struct pxa1908_pd_data data;
+ struct generic_pm_domain genpd;
+ bool initialized;
+};
+
+static inline bool pxa1908_pd_is_on(struct pxa1908_pd *pd)
+{
+ struct pxa1908_pd_ctrl *ctrl = dev_get_drvdata(&pd->genpd.dev);
+
+ return pd->data.id != PXA1908_POWER_DOMAIN_DSI
+ ? regmap_test_bits(ctrl->base, APMU_PWR_STATUS_REG, pd->data.pwr_state)
+ : regmap_test_bits(ctrl->base, APMU_DEBUG, DSI_PHY_DVM_MASK);
+}
+
+static int pxa1908_pd_power_on(struct generic_pm_domain *genpd)
+{
+ struct pxa1908_pd *pd = container_of(genpd, struct pxa1908_pd, genpd);
+ struct pxa1908_pd_ctrl *ctrl = dev_get_drvdata(&genpd->dev);
+ const struct pxa1908_pd_data *data = &pd->data;
+ unsigned int status;
+ int ret = 0;
+
+ regmap_set_bits(ctrl->base, data->reg_clk_res_ctrl, data->hw_mode);
+ if (data->id != PXA1908_POWER_DOMAIN_ISP)
+ regmap_write(ctrl->base, APMU_PWR_BLK_TMR_REG, 0x20001fff);
+ regmap_set_bits(ctrl->base, APMU_PWR_CTRL_REG, data->pwr_state);
+
+ fsleep(POWER_ON_LATENCY_US);
+
+ ret = regmap_read_poll_timeout(ctrl->base, APMU_PWR_STATUS_REG, status,
+ status & data->pwr_state, 6, 25 * USEC_PER_MSEC);
+ if (ret == -ETIMEDOUT)
+ dev_err(&genpd->dev, "timed out powering on domain '%s'\n", pd->genpd.name);
+
+ return ret;
+}
+
+static int pxa1908_pd_power_off(struct generic_pm_domain *genpd)
+{
+ struct pxa1908_pd *pd = container_of(genpd, struct pxa1908_pd, genpd);
+ struct pxa1908_pd_ctrl *ctrl = dev_get_drvdata(&genpd->dev);
+ const struct pxa1908_pd_data *data = &pd->data;
+ unsigned int status;
+ int ret;
+
+ regmap_clear_bits(ctrl->base, APMU_PWR_CTRL_REG, data->pwr_state);
+
+ fsleep(POWER_OFF_LATENCY_US);
+
+ ret = regmap_read_poll_timeout(ctrl->base, APMU_PWR_STATUS_REG, status,
+ !(status & data->pwr_state), 6, 25 * USEC_PER_MSEC);
+ if (ret == -ETIMEDOUT) {
+ dev_err(&genpd->dev, "timed out powering off domain '%s'\n", pd->genpd.name);
+ return ret;
+ }
+
+ return regmap_clear_bits(ctrl->base, data->reg_clk_res_ctrl, data->hw_mode);
+}
+
+static inline int pxa1908_dsi_power_on(struct generic_pm_domain *genpd)
+{
+ struct pxa1908_pd_ctrl *ctrl = dev_get_drvdata(&genpd->dev);
+
+ return regmap_set_bits(ctrl->base, APMU_DEBUG, DSI_PHY_DVM_MASK);
+}
+
+static inline int pxa1908_dsi_power_off(struct generic_pm_domain *genpd)
+{
+ struct pxa1908_pd_ctrl *ctrl = dev_get_drvdata(&genpd->dev);
+
+ return regmap_clear_bits(ctrl->base, APMU_DEBUG, DSI_PHY_DVM_MASK);
+}
+
+#define DOMAIN(_id, _name, ctrl, mode, state) \
+ [_id] = { \
+ .data = { \
+ .reg_clk_res_ctrl = ctrl, \
+ .hw_mode = BIT(mode), \
+ .pwr_state = BIT(state), \
+ .id = _id, \
+ }, \
+ .genpd = { \
+ .name = _name, \
+ .power_on = pxa1908_pd_power_on, \
+ .power_off = pxa1908_pd_power_off, \
+ }, \
+ }
+
+static struct pxa1908_pd domains[NR_DOMAINS] = {
+ DOMAIN(PXA1908_POWER_DOMAIN_VPU, "vpu", 0xa4, 19, 2),
+ DOMAIN(PXA1908_POWER_DOMAIN_GPU, "gpu", 0xcc, 11, 0),
+ DOMAIN(PXA1908_POWER_DOMAIN_GPU2D, "gpu2d", 0xf4, 11, 6),
+ DOMAIN(PXA1908_POWER_DOMAIN_ISP, "isp", 0x38, 15, 4),
+ [PXA1908_POWER_DOMAIN_DSI] = {
+ .genpd = {
+ .name = "dsi",
+ .power_on = pxa1908_dsi_power_on,
+ .power_off = pxa1908_dsi_power_off,
+ /*
+ * TODO: There is no DSI driver written yet and until then we probably
+ * don't want to power off the DSI PHY ever.
+ */
+ .flags = GENPD_FLAG_ALWAYS_ON,
+ },
+ .data = {
+ /* See above. */
+ .keep_on = true,
+ },
+ },
+};
+
+static void pxa1908_pd_remove(struct auxiliary_device *auxdev)
+{
+ struct pxa1908_pd *pd;
+ int ret;
+
+ for (int i = NR_DOMAINS - 1; i >= 0; i--) {
+ pd = &domains[i];
+
+ if (!pd->initialized)
+ continue;
+
+ if (pxa1908_pd_is_on(pd) && !pd->data.keep_on)
+ pxa1908_pd_power_off(&pd->genpd);
+
+ ret = pm_genpd_remove(&pd->genpd);
+ if (ret)
+ dev_err(&pd->genpd.dev, "failed to remove domain '%s': %d\n",
+ pd->genpd.name, ret);
+ }
+}
+
+static int
+pxa1908_pd_init(struct pxa1908_pd_ctrl *ctrl, int id, struct device *dev)
+{
+ struct pxa1908_pd *pd = &domains[id];
+ int ret;
+
+ ctrl->domains[id] = &pd->genpd;
+
+ ret = pm_genpd_init(&pd->genpd, NULL, !pd->data.keep_on);
+ if (ret)
+ return dev_err_probe(dev, ret, "domain '%s' failed to initialize\n",
+ pd->genpd.name);
+
+ dev_set_drvdata(&pd->genpd.dev, ctrl);
+
+ /* Make sure the state of the hardware is synced with the domain table above. */
+ if (pd->data.keep_on) {
+ ret = pd->genpd.power_on(&pd->genpd);
+ if (ret)
+ return dev_err_probe(dev, ret, "failed to power on domain '%s'\n",
+ pd->genpd.name);
+ } else {
+ if (pxa1908_pd_is_on(pd)) {
+ dev_warn(dev,
+ "domain '%s' is on despite being default off; powering off\n",
+ pd->genpd.name);
+
+ ret = pd->genpd.power_off(&pd->genpd);
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "failed to power off domain '%s'\n",
+ pd->genpd.name);
+ }
+ }
+
+ pd->initialized = true;
+
+ return 0;
+}
+
+static int
+pxa1908_pd_probe(struct auxiliary_device *auxdev, const struct auxiliary_device_id *aux_id)
+{
+ struct pxa1908_pd_ctrl *ctrl;
+ struct device *dev = &auxdev->dev;
+ int ret;
+
+ ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
+ if (!ctrl)
+ return -ENOMEM;
+
+ auxiliary_set_drvdata(auxdev, ctrl);
+
+ ctrl->base = syscon_node_to_regmap(dev->parent->of_node);
+ if (IS_ERR(ctrl->base))
+ return dev_err_probe(dev, PTR_ERR(ctrl->base), "no regmap available\n");
+
+ ctrl->onecell_data.domains = ctrl->domains;
+ ctrl->onecell_data.num_domains = NR_DOMAINS;
+
+ for (int i = 0; i < NR_DOMAINS; i++) {
+ ret = pxa1908_pd_init(ctrl, i, dev);
+ if (ret)
+ goto err;
+ }
+
+ return of_genpd_add_provider_onecell(dev->parent->of_node, &ctrl->onecell_data);
+
+err:
+ pxa1908_pd_remove(auxdev);
+ return ret;
+}
+
+static const struct auxiliary_device_id pxa1908_pd_id[] = {
+ { .name = "clk_pxa1908_apmu.power" },
+ { }
+};
+MODULE_DEVICE_TABLE(auxiliary, pxa1908_pd_id);
+
+static struct auxiliary_driver pxa1908_pd_driver = {
+ .probe = pxa1908_pd_probe,
+ .remove = pxa1908_pd_remove,
+ .id_table = pxa1908_pd_id,
+};
+module_auxiliary_driver(pxa1908_pd_driver);
+
+MODULE_AUTHOR("Duje Mihanović <duje@dujemihanovic.xyz>");
+MODULE_DESCRIPTION("Marvell PXA1908 power domain driver");
+MODULE_LICENSE("GPL");
--
2.51.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v3 3/4] clk: mmp: pxa1908: Instantiate power driver through auxiliary bus
2025-08-29 16:21 [PATCH v3 0/4] Marvell PXA1908 power domains Duje Mihanović
2025-08-29 16:21 ` [PATCH v3 1/4] dt-bindings: clock: marvell,pxa1908: Add syscon compatible to apmu Duje Mihanović
2025-08-29 16:21 ` [PATCH v3 2/4] pmdomain: marvell: Add PXA1908 power domains Duje Mihanović
@ 2025-08-29 16:21 ` Duje Mihanović
2025-08-29 16:21 ` [PATCH v3 4/4] arm64: dts: marvell: pxa1908: Add power domains Duje Mihanović
3 siblings, 0 replies; 5+ messages in thread
From: Duje Mihanović @ 2025-08-29 16:21 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Ulf Hansson
Cc: David Wronek, Karel Balej, phone-devel, ~postmarketos/upstreaming,
linux-arm-kernel, linux-clk, devicetree, linux-kernel, linux-pm,
Duje Mihanović
The power domain driver shares the APMU clock controller's registers.
Instantiate the power domain driver through the APMU clock driver using
the auxiliary bus.
Also create a separate Kconfig entry for the PXA1908 clock driver to
allow (de)selecting the driver at will and selecting
CONFIG_AUXILIARY_BUS.
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
v3:
- Move driver back to pmdomain subsystem, use auxiliary bus to
instantiate the driver
v2:
- Move to clk subsystem, instantiate the driver from the APMU clock
driver
- Drop clock handling
- Squash MAINTAINERS patch
---
MAINTAINERS | 2 ++
drivers/clk/Kconfig | 1 +
drivers/clk/mmp/Kconfig | 10 ++++++++++
drivers/clk/mmp/Makefile | 5 ++++-
drivers/clk/mmp/clk-pxa1908-apmu.c | 20 ++++++++++++++++++++
5 files changed, 37 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 34e5e218e83e0ed9882b111f5251601dd6549d4e..88c0df09d7b354f95864f5a48daea3be14a90dc4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2869,7 +2869,9 @@ ARM/Marvell PXA1908 SOC support
M: Duje Mihanović <duje@dujemihanovic.xyz>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
+F: Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml
F: arch/arm64/boot/dts/marvell/mmp/
+F: drivers/clk/mmp/Kconfig
F: drivers/clk/mmp/clk-pxa1908*.c
F: drivers/pmdomain/marvell/
F: include/dt-bindings/clock/marvell,pxa1908.h
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 4d56475f94fc1e28823fe6aee626a96847d4e6d5..68a9641fc649a23013b2d8a9e9f5ecb31d623abb 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -511,6 +511,7 @@ source "drivers/clk/imx/Kconfig"
source "drivers/clk/ingenic/Kconfig"
source "drivers/clk/keystone/Kconfig"
source "drivers/clk/mediatek/Kconfig"
+source "drivers/clk/mmp/Kconfig"
source "drivers/clk/meson/Kconfig"
source "drivers/clk/mstar/Kconfig"
source "drivers/clk/microchip/Kconfig"
diff --git a/drivers/clk/mmp/Kconfig b/drivers/clk/mmp/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..b0d2fea3cda5de1284916ab75d3af0412edcf57f
--- /dev/null
+++ b/drivers/clk/mmp/Kconfig
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+config COMMON_CLK_PXA1908
+ bool "Clock driver for Marvell PXA1908"
+ depends on ARCH_MMP || COMPILE_TEST
+ depends on OF
+ default y if ARCH_MMP && ARM64
+ select AUXILIARY_BUS
+ help
+ This driver supports the Marvell PXA1908 SoC clocks.
diff --git a/drivers/clk/mmp/Makefile b/drivers/clk/mmp/Makefile
index 062cd87fa8ddcc6808b6236f8c4dd524aaf02030..0a94f2f0856389c8e959981ccafbb02140a7733d 100644
--- a/drivers/clk/mmp/Makefile
+++ b/drivers/clk/mmp/Makefile
@@ -11,4 +11,7 @@ obj-$(CONFIG_MACH_MMP_DT) += clk-of-pxa168.o clk-of-pxa910.o
obj-$(CONFIG_COMMON_CLK_MMP2) += clk-of-mmp2.o clk-pll.o pwr-island.o
obj-$(CONFIG_COMMON_CLK_MMP2_AUDIO) += clk-audio.o
-obj-$(CONFIG_ARCH_MMP) += clk-of-pxa1928.o clk-pxa1908-apbc.o clk-pxa1908-apbcp.o clk-pxa1908-apmu.o clk-pxa1908-mpmu.o
+obj-$(CONFIG_COMMON_CLK_PXA1908) += clk-pxa1908-apbc.o clk-pxa1908-apbcp.o \
+ clk-pxa1908-mpmu.o clk-pxa1908-apmu.o
+
+obj-$(CONFIG_ARCH_MMP) += clk-of-pxa1928.o
diff --git a/drivers/clk/mmp/clk-pxa1908-apmu.c b/drivers/clk/mmp/clk-pxa1908-apmu.c
index d3a070687fc5b9fb5338f377f82e7664ca0aac29..eab02c89c9153619ac53f7486ed811f2cae12a43 100644
--- a/drivers/clk/mmp/clk-pxa1908-apmu.c
+++ b/drivers/clk/mmp/clk-pxa1908-apmu.c
@@ -1,4 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
+#include <linux/auxiliary_bus.h>
#include <linux/clk-provider.h>
#include <linux/module.h>
#include <linux/platform_device.h>
@@ -85,6 +86,8 @@ static void pxa1908_axi_periph_clk_init(struct pxa1908_clk_unit *pxa_unit)
static int pxa1908_apmu_probe(struct platform_device *pdev)
{
struct pxa1908_clk_unit *pxa_unit;
+ struct auxiliary_device *adev;
+ int ret;
pxa_unit = devm_kzalloc(&pdev->dev, sizeof(*pxa_unit), GFP_KERNEL);
if (!pxa_unit)
@@ -94,6 +97,23 @@ static int pxa1908_apmu_probe(struct platform_device *pdev)
if (IS_ERR(pxa_unit->base))
return PTR_ERR(pxa_unit->base);
+ adev = devm_kzalloc(&pdev->dev, sizeof(*adev), GFP_KERNEL);
+ if (!adev)
+ return -ENOMEM;
+
+ adev->name = "power";
+ adev->dev.parent = &pdev->dev;
+
+ ret = auxiliary_device_init(adev);
+ if (ret)
+ return ret;
+
+ ret = auxiliary_device_add(adev);
+ if (ret) {
+ auxiliary_device_uninit(adev);
+ return ret;
+ }
+
mmp_clk_init(pdev->dev.of_node, &pxa_unit->unit, APMU_NR_CLKS);
pxa1908_axi_periph_clk_init(pxa_unit);
--
2.51.0
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