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[2003:e4:1f1c:4d00:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with UTF8SMTPSA id 5b1f17b1804b1-45b6b1cdf05sm163708975e9.1.2025.09.02.08.47.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Sep 2025 08:47:01 -0700 (PDT) From: Thierry Reding To: Thierry Reding , David Airlie , Simona Vetter , Sumit Semwal Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Benjamin Gaignard , Brian Starkey , John Stultz , "T.J. Mercier" , Andrew Morton , David Hildenbrand , Mike Rapoport , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linaro-mm-sig@lists.linaro.org, linux-mm@kvack.org Subject: [PATCH 7/9] arm64: tegra: Add GPU node on Tegra234 Date: Tue, 2 Sep 2025 17:46:27 +0200 Message-ID: <20250902154630.4032984-8-thierry.reding@gmail.com> X-Mailer: git-send-email 2.50.0 In-Reply-To: <20250902154630.4032984-1-thierry.reding@gmail.com> References: <20250902154630.4032984-1-thierry.reding@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Thierry Reding Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra234.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi index 4d572f5fa0b1..4f8031055ad0 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -5262,6 +5262,23 @@ pcie-ep@141e0000 { }; }; + gpu@17000000 { + compatible = "nvidia,ga10b"; + reg = <0x0 0x17000000 0x0 0x1000000>, + <0x0 0x18000000 0x0 0x1000000>; + interrupts = , + , + , + ; + interrupt-names = "nonstall", "stall0", "stall1", "stall2"; + power-domains = <&bpmp TEGRA234_POWER_DOMAIN_GPU>; + clocks = <&bpmp TEGRA234_CLK_GPUSYS>, + <&bpmp TEGRA234_CLK_GPC0CLK>, + <&bpmp TEGRA234_CLK_GPC1CLK>; + clock-names = "sys", "gpc0", "gpc1"; + resets = <&bpmp TEGRA234_RESET_GPU>; + }; + sram@40000000 { compatible = "nvidia,tegra234-sysram", "mmio-sram"; reg = <0x0 0x40000000 0x0 0x80000>; -- 2.50.0