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From: Abel Vesa <abel.vesa@linaro.org>
To: Vinod Koul <vkoul@kernel.org>,
	 Kishon Vijay Abraham I <kishon@kernel.org>,
	Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	 Dmitry Baryshkov <lumag@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	 Sibi Sankar <quic_sibis@quicinc.com>,
	 Rajendra Nayak <quic_rjendra@quicinc.com>
Cc: Johan Hovold <johan@kernel.org>,
	Taniya Das <quic_tdas@quicinc.com>,
	 Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	 linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	 Abel Vesa <abel.vesa@linaro.org>,
	stable@vger.kernel.org
Subject: [PATCH v2 2/3] phy: qcom: edp: Make the number of clocks flexible
Date: Wed, 03 Sep 2025 15:37:43 +0300	[thread overview]
Message-ID: <20250903-phy-qcom-edp-add-missing-refclk-v2-2-d88c1b0cdc1b@linaro.org> (raw)
In-Reply-To: <20250903-phy-qcom-edp-add-missing-refclk-v2-0-d88c1b0cdc1b@linaro.org>

On X Elite, the DP PHY needs another clock called refclk,
while all other platforms do not. So get all the clocks
regardless of how many there are provided.

Cc: stable@vger.kernel.org # v6.10
Fixes: db83c107dc29 ("phy: qcom: edp: Add v6 specific ops and X1E80100 platform support")
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
 drivers/phy/qualcomm/phy-qcom-edp.c | 18 ++++++++++--------
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c
index f1b51018683d51df064f60440864c6031638670c..116b7f7b4f8be93e5128c3cc6f382ce7576accbc 100644
--- a/drivers/phy/qualcomm/phy-qcom-edp.c
+++ b/drivers/phy/qualcomm/phy-qcom-edp.c
@@ -103,7 +103,9 @@ struct qcom_edp {
 
 	struct phy_configure_opts_dp dp_opts;
 
-	struct clk_bulk_data clks[2];
+	struct clk_bulk_data *clks;
+	int num_clks;
+
 	struct regulator_bulk_data supplies[2];
 
 	bool is_edp;
@@ -218,7 +220,7 @@ static int qcom_edp_phy_init(struct phy *phy)
 	if (ret)
 		return ret;
 
-	ret = clk_bulk_prepare_enable(ARRAY_SIZE(edp->clks), edp->clks);
+	ret = clk_bulk_prepare_enable(edp->num_clks, edp->clks);
 	if (ret)
 		goto out_disable_supplies;
 
@@ -885,7 +887,7 @@ static int qcom_edp_phy_exit(struct phy *phy)
 {
 	struct qcom_edp *edp = phy_get_drvdata(phy);
 
-	clk_bulk_disable_unprepare(ARRAY_SIZE(edp->clks), edp->clks);
+	clk_bulk_disable_unprepare(edp->num_clks, edp->clks);
 	regulator_bulk_disable(ARRAY_SIZE(edp->supplies), edp->supplies);
 
 	return 0;
@@ -1092,11 +1094,11 @@ static int qcom_edp_phy_probe(struct platform_device *pdev)
 	if (IS_ERR(edp->pll))
 		return PTR_ERR(edp->pll);
 
-	edp->clks[0].id = "aux";
-	edp->clks[1].id = "cfg_ahb";
-	ret = devm_clk_bulk_get(dev, ARRAY_SIZE(edp->clks), edp->clks);
-	if (ret)
-		return ret;
+	edp->num_clks = devm_clk_bulk_get_all(dev, &edp->clks);
+	if (edp->num_clks < 0) {
+		dev_err(dev, "Failed to get clocks\n");
+		return edp->num_clks;
+	}
 
 	edp->supplies[0].supply = "vdda-phy";
 	edp->supplies[1].supply = "vdda-pll";

-- 
2.45.2


  parent reply	other threads:[~2025-09-03 12:38 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-03 12:37 [PATCH v2 0/3] phy: qcom: edp: Add missing refclk clock to x1e80100 Abel Vesa
2025-09-03 12:37 ` [PATCH v2 1/3] dt-bindings: phy: qcom-edp: Add missing clock for X Elite Abel Vesa
2025-09-03 13:37   ` Konrad Dybcio
2025-09-03 23:51     ` Rob Herring
2025-09-04  8:11       ` Konrad Dybcio
2025-09-04  8:37         ` Abel Vesa
2025-09-04  6:50   ` Krzysztof Kozlowski
2025-09-04  6:51     ` Krzysztof Kozlowski
2025-09-04  8:35       ` Abel Vesa
2025-09-03 12:37 ` Abel Vesa [this message]
2025-09-03 13:38   ` [PATCH v2 2/3] phy: qcom: edp: Make the number of clocks flexible Konrad Dybcio
2025-09-03 12:37 ` [PATCH v2 3/3] arm64: dts: qcom: Add missing TCSR refclk to the DP PHYs Abel Vesa
2025-09-04  8:40   ` Konrad Dybcio
2025-09-04  8:52     ` Abel Vesa

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