* [PATCH 0/2] Move sdhci0 from common & update sdhci0
@ 2025-09-04 0:47 Judith Mendez
2025-09-04 0:47 ` [PATCH 1/2] arm64: dts: ti: k3-am62p/j722s: Move sdhci0 from common Judith Mendez
2025-09-04 0:47 ` [PATCH 2/2] arm64: dts: ti: k3-am62p: Update sdhci0 tap setting & STRB Judith Mendez
0 siblings, 2 replies; 5+ messages in thread
From: Judith Mendez @ 2025-09-04 0:47 UTC (permalink / raw)
To: Judith Mendez, Nishanth Menon
Cc: Moteen Shah, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree,
linux-kernel
Since eMMC HS400 has been descoped for j722s due to errata i2478 [0]
and is supported for am62p SR1.2 device, remove sdhci0 node from
common-main.dtsi and include instead in each device's main.dtsi
appropriately.
Also, update the tap settings and STRB for am62p eMMC sdhci0 node.
Tested on am62p SK board.
Judith Mendez (2):
arm64: dts: ti: k3-am62p/j722s: Move sdhci0 from common
arm64: dts: ti: k3-am62p: Update eMMC tap setting & STRB
.../dts/ti/k3-am62p-j722s-common-main.dtsi | 25 -------------------
arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 25 +++++++++++++++++++
arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 22 ++++++++++++++++
3 files changed, 47 insertions(+), 25 deletions(-)
--
2.51.0
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] arm64: dts: ti: k3-am62p/j722s: Move sdhci0 from common
2025-09-04 0:47 [PATCH 0/2] Move sdhci0 from common & update sdhci0 Judith Mendez
@ 2025-09-04 0:47 ` Judith Mendez
2025-09-04 3:38 ` Nishanth Menon
2025-09-04 0:47 ` [PATCH 2/2] arm64: dts: ti: k3-am62p: Update sdhci0 tap setting & STRB Judith Mendez
1 sibling, 1 reply; 5+ messages in thread
From: Judith Mendez @ 2025-09-04 0:47 UTC (permalink / raw)
To: Judith Mendez, Nishanth Menon
Cc: Moteen Shah, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree,
linux-kernel
Since eMMC HS400 has been descoped for j722s due to errata i2478 [0]
and is supported for am62p SR1.2 device, remove sdhci0 node from
common-main.dtsi and include instead in each device's main.dtsi
appropriately.
[0] https://www.ti.com/lit/pdf/sprz575
Signed-off-by: Judith Mendez <jm@ti.com>
---
.../dts/ti/k3-am62p-j722s-common-main.dtsi | 25 -------------------
arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 25 +++++++++++++++++++
arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 22 ++++++++++++++++
3 files changed, 47 insertions(+), 25 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
index 4427b12058a6..84083f5125df 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
@@ -566,31 +566,6 @@ main_gpio1: gpio@601000 {
clock-names = "gpio";
};
- sdhci0: mmc@fa10000 {
- compatible = "ti,am64-sdhci-8bit";
- reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
- interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 57 1>, <&k3_clks 57 2>;
- clock-names = "clk_ahb", "clk_xin";
- bus-width = <8>;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- mmc-hs400-1_8v;
- ti,clkbuf-sel = <0x7>;
- ti,strobe-sel = <0x77>;
- ti,trm-icp = <0x8>;
- ti,otap-del-sel-legacy = <0x1>;
- ti,otap-del-sel-mmc-hs = <0x1>;
- ti,otap-del-sel-ddr52 = <0x6>;
- ti,otap-del-sel-hs200 = <0x8>;
- ti,otap-del-sel-hs400 = <0x5>;
- ti,itap-del-sel-legacy = <0x10>;
- ti,itap-del-sel-mmc-hs = <0xa>;
- ti,itap-del-sel-ddr52 = <0x3>;
- status = "disabled";
- };
-
sdhci1: mmc@fa00000 {
compatible = "ti,am62-sdhci";
reg = <0x00 0x0fa00000 0x00 0x1000>, <0x00 0x0fa08000 0x00 0x400>;
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
index 6aea9d3f134e..fb8473ce403a 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
@@ -31,6 +31,31 @@ usb1: usb@31100000 {
snps,usb2-lpm-disable;
};
};
+
+ sdhci0: mmc@fa10000 {
+ compatible = "ti,am64-sdhci-8bit";
+ reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
+ interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 57 1>, <&k3_clks 57 2>;
+ clock-names = "clk_ahb", "clk_xin";
+ bus-width = <8>;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ ti,clkbuf-sel = <0x7>;
+ ti,strobe-sel = <0x77>;
+ ti,trm-icp = <0x8>;
+ ti,otap-del-sel-legacy = <0x1>;
+ ti,otap-del-sel-mmc-hs = <0x1>;
+ ti,otap-del-sel-ddr52 = <0x6>;
+ ti,otap-del-sel-hs200 = <0x8>;
+ ti,otap-del-sel-hs400 = <0x5>;
+ ti,itap-del-sel-legacy = <0x10>;
+ ti,itap-del-sel-mmc-hs = <0xa>;
+ ti,itap-del-sel-ddr52 = <0x3>;
+ status = "disabled";
+ };
};
&oc_sram {
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
index 993828872dfb..2978fe1a151e 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
@@ -404,6 +404,28 @@ e5010: jpeg-encoder@fd20000 {
power-domains = <&k3_pds 201 TI_SCI_PD_EXCLUSIVE>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ sdhci0: mmc@fa10000 {
+ compatible = "ti,am64-sdhci-8bit";
+ reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
+ interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 57 1>, <&k3_clks 57 2>;
+ clock-names = "clk_ahb", "clk_xin";
+ bus-width = <8>;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ ti,clkbuf-sel = <0x7>;
+ ti,trm-icp = <0x8>;
+ ti,otap-del-sel-legacy = <0x1>;
+ ti,otap-del-sel-mmc-hs = <0x1>;
+ ti,otap-del-sel-ddr52 = <0x6>;
+ ti,otap-del-sel-hs200 = <0x8>;
+ ti,itap-del-sel-legacy = <0x10>;
+ ti,itap-del-sel-mmc-hs = <0xa>;
+ ti,itap-del-sel-ddr52 = <0x3>;
+ status = "disabled";
+ };
};
&main_bcdma_csi {
--
2.51.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] arm64: dts: ti: k3-am62p: Update sdhci0 tap setting & STRB
2025-09-04 0:47 [PATCH 0/2] Move sdhci0 from common & update sdhci0 Judith Mendez
2025-09-04 0:47 ` [PATCH 1/2] arm64: dts: ti: k3-am62p/j722s: Move sdhci0 from common Judith Mendez
@ 2025-09-04 0:47 ` Judith Mendez
1 sibling, 0 replies; 5+ messages in thread
From: Judith Mendez @ 2025-09-04 0:47 UTC (permalink / raw)
To: Judith Mendez, Nishanth Menon
Cc: Moteen Shah, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree,
linux-kernel
Tap setting for eMMC have been updated in device datasheet [0],
so update for am62p in k3-am62p-main.
[0] https://www.ti.com/lit/gpn/am62p
Signed-off-by: Judith Mendez <jm@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
index fb8473ce403a..9441317e39aa 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
@@ -44,10 +44,10 @@ sdhci0: mmc@fa10000 {
mmc-hs200-1_8v;
mmc-hs400-1_8v;
ti,clkbuf-sel = <0x7>;
- ti,strobe-sel = <0x77>;
+ ti,strobe-sel = <0x66>;
ti,trm-icp = <0x8>;
- ti,otap-del-sel-legacy = <0x1>;
- ti,otap-del-sel-mmc-hs = <0x1>;
+ ti,otap-del-sel-legacy = <0x0>;
+ ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-ddr52 = <0x6>;
ti,otap-del-sel-hs200 = <0x8>;
ti,otap-del-sel-hs400 = <0x5>;
--
2.51.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] arm64: dts: ti: k3-am62p/j722s: Move sdhci0 from common
2025-09-04 0:47 ` [PATCH 1/2] arm64: dts: ti: k3-am62p/j722s: Move sdhci0 from common Judith Mendez
@ 2025-09-04 3:38 ` Nishanth Menon
2025-09-04 15:27 ` Judith Mendez
0 siblings, 1 reply; 5+ messages in thread
From: Nishanth Menon @ 2025-09-04 3:38 UTC (permalink / raw)
To: Judith Mendez
Cc: Moteen Shah, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree,
linux-kernel
On 19:47-20250903, Judith Mendez wrote:
> Since eMMC HS400 has been descoped for j722s due to errata i2478 [0]
> and is supported for am62p SR1.2 device, remove sdhci0 node from
> common-main.dtsi and include instead in each device's main.dtsi
> appropriately.
>
> [0] https://www.ti.com/lit/pdf/sprz575
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
> .../dts/ti/k3-am62p-j722s-common-main.dtsi | 25 -------------------
> arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 25 +++++++++++++++++++
> arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 22 ++++++++++++++++
> 3 files changed, 47 insertions(+), 25 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
> index 4427b12058a6..84083f5125df 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
> @@ -566,31 +566,6 @@ main_gpio1: gpio@601000 {
> clock-names = "gpio";
> };
>
> - sdhci0: mmc@fa10000 {
> - compatible = "ti,am64-sdhci-8bit";
> - reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
> - interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> - power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 57 1>, <&k3_clks 57 2>;
> - clock-names = "clk_ahb", "clk_xin";
> - bus-width = <8>;
> - mmc-ddr-1_8v;
> - mmc-hs200-1_8v;
> - mmc-hs400-1_8v;
> - ti,clkbuf-sel = <0x7>;
> - ti,strobe-sel = <0x77>;
> - ti,trm-icp = <0x8>;
> - ti,otap-del-sel-legacy = <0x1>;
> - ti,otap-del-sel-mmc-hs = <0x1>;
> - ti,otap-del-sel-ddr52 = <0x6>;
> - ti,otap-del-sel-hs200 = <0x8>;
> - ti,otap-del-sel-hs400 = <0x5>;
would'nt it be sufficient to provide this in am62p and keep the common
stuff here?
Additionally handling of SR1.2 should be documented in am62p
> - ti,itap-del-sel-legacy = <0x10>;
> - ti,itap-del-sel-mmc-hs = <0xa>;
> - ti,itap-del-sel-ddr52 = <0x3>;
> - status = "disabled";
> - };
> -
> sdhci1: mmc@fa00000 {
> compatible = "ti,am62-sdhci";
> reg = <0x00 0x0fa00000 0x00 0x1000>, <0x00 0x0fa08000 0x00 0x400>;
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> index 6aea9d3f134e..fb8473ce403a 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> @@ -31,6 +31,31 @@ usb1: usb@31100000 {
> snps,usb2-lpm-disable;
> };
> };
> +
> + sdhci0: mmc@fa10000 {
> + compatible = "ti,am64-sdhci-8bit";
> + reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
> + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 57 1>, <&k3_clks 57 2>;
> + clock-names = "clk_ahb", "clk_xin";
> + bus-width = <8>;
> + mmc-ddr-1_8v;
> + mmc-hs200-1_8v;
> + mmc-hs400-1_8v;
> + ti,clkbuf-sel = <0x7>;
> + ti,strobe-sel = <0x77>;
> + ti,trm-icp = <0x8>;
> + ti,otap-del-sel-legacy = <0x1>;
> + ti,otap-del-sel-mmc-hs = <0x1>;
> + ti,otap-del-sel-ddr52 = <0x6>;
> + ti,otap-del-sel-hs200 = <0x8>;
> + ti,otap-del-sel-hs400 = <0x5>;
> + ti,itap-del-sel-legacy = <0x10>;
> + ti,itap-del-sel-mmc-hs = <0xa>;
> + ti,itap-del-sel-ddr52 = <0x3>;
> + status = "disabled";
> + };
> };
>
> &oc_sram {
> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
> index 993828872dfb..2978fe1a151e 100644
> --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
> @@ -404,6 +404,28 @@ e5010: jpeg-encoder@fd20000 {
> power-domains = <&k3_pds 201 TI_SCI_PD_EXCLUSIVE>;
> interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
> };
> +
> + sdhci0: mmc@fa10000 {
> + compatible = "ti,am64-sdhci-8bit";
> + reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
> + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 57 1>, <&k3_clks 57 2>;
> + clock-names = "clk_ahb", "clk_xin";
> + bus-width = <8>;
> + mmc-ddr-1_8v;
> + mmc-hs200-1_8v;
> + ti,clkbuf-sel = <0x7>;
> + ti,trm-icp = <0x8>;
> + ti,otap-del-sel-legacy = <0x1>;
> + ti,otap-del-sel-mmc-hs = <0x1>;
> + ti,otap-del-sel-ddr52 = <0x6>;
> + ti,otap-del-sel-hs200 = <0x8>;
> + ti,itap-del-sel-legacy = <0x10>;
> + ti,itap-del-sel-mmc-hs = <0xa>;
> + ti,itap-del-sel-ddr52 = <0x3>;
> + status = "disabled";
> + };
> };
>
> &main_bcdma_csi {
> --
> 2.51.0
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
https://ti.com/opensource
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] arm64: dts: ti: k3-am62p/j722s: Move sdhci0 from common
2025-09-04 3:38 ` Nishanth Menon
@ 2025-09-04 15:27 ` Judith Mendez
0 siblings, 0 replies; 5+ messages in thread
From: Judith Mendez @ 2025-09-04 15:27 UTC (permalink / raw)
To: Nishanth Menon
Cc: Moteen Shah, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree,
linux-kernel
Hi Nishanth,
On 9/3/25 10:38 PM, Nishanth Menon wrote:
> On 19:47-20250903, Judith Mendez wrote:
>> Since eMMC HS400 has been descoped for j722s due to errata i2478 [0]
>> and is supported for am62p SR1.2 device, remove sdhci0 node from
>> common-main.dtsi and include instead in each device's main.dtsi
>> appropriately.
>>
>> [0] https://www.ti.com/lit/pdf/sprz575
>> Signed-off-by: Judith Mendez <jm@ti.com>
>> ---
>> .../dts/ti/k3-am62p-j722s-common-main.dtsi | 25 -------------------
>> arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 25 +++++++++++++++++++
>> arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 22 ++++++++++++++++
>> 3 files changed, 47 insertions(+), 25 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
>> index 4427b12058a6..84083f5125df 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
>> @@ -566,31 +566,6 @@ main_gpio1: gpio@601000 {
>> clock-names = "gpio";
>> };
>>
>> - sdhci0: mmc@fa10000 {
>> - compatible = "ti,am64-sdhci-8bit";
>> - reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
>> - interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
>> - power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
>> - clocks = <&k3_clks 57 1>, <&k3_clks 57 2>;
>> - clock-names = "clk_ahb", "clk_xin";
>> - bus-width = <8>;
>> - mmc-ddr-1_8v;
>> - mmc-hs200-1_8v;
>> - mmc-hs400-1_8v;
>> - ti,clkbuf-sel = <0x7>;
>> - ti,strobe-sel = <0x77>;
>> - ti,trm-icp = <0x8>;
>> - ti,otap-del-sel-legacy = <0x1>;
>> - ti,otap-del-sel-mmc-hs = <0x1>;
>> - ti,otap-del-sel-ddr52 = <0x6>;
>> - ti,otap-del-sel-hs200 = <0x8>;
>> - ti,otap-del-sel-hs400 = <0x5>;
>
> would'nt it be sufficient to provide this in am62p and keep the common
> stuff here?
Either way works, I can keep a common no problem.
>
> Additionally handling of SR1.2 should be documented in am62p
WYM? Why document anything on SR1.2? For am62p, we support HS400 mode
which is the default, all other silicon revision will automatically
be reduced to HS200, that logic is abstracted away in the driver.
There is nothing to document here IMO.
~ Judith
>
>> - ti,itap-del-sel-legacy = <0x10>;
>> - ti,itap-del-sel-mmc-hs = <0xa>;
>> - ti,itap-del-sel-ddr52 = <0x3>;
>> - status = "disabled";
>> - };
>> -
>> sdhci1: mmc@fa00000 {
>> compatible = "ti,am62-sdhci";
>> reg = <0x00 0x0fa00000 0x00 0x1000>, <0x00 0x0fa08000 0x00 0x400>;
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
>> index 6aea9d3f134e..fb8473ce403a 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
>> @@ -31,6 +31,31 @@ usb1: usb@31100000 {
>> snps,usb2-lpm-disable;
>> };
>> };
>> +
>> + sdhci0: mmc@fa10000 {
>> + compatible = "ti,am64-sdhci-8bit";
>> + reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
>> + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
>> + power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
>> + clocks = <&k3_clks 57 1>, <&k3_clks 57 2>;
>> + clock-names = "clk_ahb", "clk_xin";
>> + bus-width = <8>;
>> + mmc-ddr-1_8v;
>> + mmc-hs200-1_8v;
>> + mmc-hs400-1_8v;
>> + ti,clkbuf-sel = <0x7>;
>> + ti,strobe-sel = <0x77>;
>> + ti,trm-icp = <0x8>;
>> + ti,otap-del-sel-legacy = <0x1>;
>> + ti,otap-del-sel-mmc-hs = <0x1>;
>> + ti,otap-del-sel-ddr52 = <0x6>;
>> + ti,otap-del-sel-hs200 = <0x8>;
>> + ti,otap-del-sel-hs400 = <0x5>;
>> + ti,itap-del-sel-legacy = <0x10>;
>> + ti,itap-del-sel-mmc-hs = <0xa>;
>> + ti,itap-del-sel-ddr52 = <0x3>;
>> + status = "disabled";
>> + };
>> };
>>
>> &oc_sram {
>> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
>> index 993828872dfb..2978fe1a151e 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
>> @@ -404,6 +404,28 @@ e5010: jpeg-encoder@fd20000 {
>> power-domains = <&k3_pds 201 TI_SCI_PD_EXCLUSIVE>;
>> interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
>> };
>> +
>> + sdhci0: mmc@fa10000 {
>> + compatible = "ti,am64-sdhci-8bit";
>> + reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
>> + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
>> + power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
>> + clocks = <&k3_clks 57 1>, <&k3_clks 57 2>;
>> + clock-names = "clk_ahb", "clk_xin";
>> + bus-width = <8>;
>> + mmc-ddr-1_8v;
>> + mmc-hs200-1_8v;
>> + ti,clkbuf-sel = <0x7>;
>> + ti,trm-icp = <0x8>;
>> + ti,otap-del-sel-legacy = <0x1>;
>> + ti,otap-del-sel-mmc-hs = <0x1>;
>> + ti,otap-del-sel-ddr52 = <0x6>;
>> + ti,otap-del-sel-hs200 = <0x8>;
>> + ti,itap-del-sel-legacy = <0x10>;
>> + ti,itap-del-sel-mmc-hs = <0xa>;
>> + ti,itap-del-sel-ddr52 = <0x3>;
>> + status = "disabled";
>> + };
>> };
>>
>> &main_bcdma_csi {
>> --
>> 2.51.0
>>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2025-09-04 15:27 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2025-09-04 0:47 [PATCH 0/2] Move sdhci0 from common & update sdhci0 Judith Mendez
2025-09-04 0:47 ` [PATCH 1/2] arm64: dts: ti: k3-am62p/j722s: Move sdhci0 from common Judith Mendez
2025-09-04 3:38 ` Nishanth Menon
2025-09-04 15:27 ` Judith Mendez
2025-09-04 0:47 ` [PATCH 2/2] arm64: dts: ti: k3-am62p: Update sdhci0 tap setting & STRB Judith Mendez
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