From: Yulin Lu <luyulin@eswincomputing.com>
To: dlemoal@kernel.org, cassel@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org,
linux-ide@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, vkoul@kernel.org,
kishon@kernel.org, linux-phy@lists.infradead.org
Cc: ningyu@eswincomputing.com, zhengyu@eswincomputing.com,
linmin@eswincomputing.com, huangyifeng@eswincomputing.com,
fenglin@eswincomputing.com, lianghujun@eswincomputing.com,
Yulin Lu <luyulin@eswincomputing.com>
Subject: [PATCH v3 0/3] Add driver support for Eswin EIC7700 SoC SATA Controller and PHY
Date: Thu, 4 Sep 2025 14:34:27 +0800 [thread overview]
Message-ID: <20250904063427.1954-1-luyulin@eswincomputing.com> (raw)
This series depends on the config option patch [1].
[1] https://lore.kernel.org/all/20250825132427.1618089-3-pinkesh.vaghela@einfochips.com/
Updates:
v2 -> v3:
- Use full name in "From" and "Signed-off-by" fields information.
- eswin,eic7700-ahci.yaml
- Remove the introduction to the reg, interrupts, phys, and phy-names fields.
- Modify the usage of the clocks field in the examples.
- Corrected the order of dt properties.
- phy-eic7700-sata.c
- Register operations use the GENMASK macro and FIELD_PREP instead of
the original bit offset method, and add "#include <linux/bitfield.h>".
- Modified some macro definition names.
- Remove the redundant initialization assignments for "ret" and "val".
- Delete ".suppress_bind_attrs = true".
- Modify the driver name.
- Add "#include <linux/io.h>" to fix the robot test issue.
- Link to v2: https://lore.kernel.org/lkml/20250819134722.220-1-luyulin@eswincomputing.com/
v2 -> v1:
- Delete the original controller driver and use ahci_dwc.c instead.
- Add eswin,eic7700-ahci.yaml
- Correct the descriptions of reset, interrupt and other
hardware resources for the sata controller on EIC7700 SoC.
- The clocks for both sata controller and sata PHY are controlled
via a register bit in the HSP bus and are not registered in the
clock tree. Clock are managed within the PHY driver, therefore
it is not described in this document.
- Add $ref: snps,dwc-ahci-common.yaml#.
- Add eswin,eic7700-sata-phy.yaml
- Add this file to include the description of the PHY on EIC7700 SoC.
- Add an eswin directory under the PHY driver path, and include the SATA
PHY driver code for EIC7700 SoC.
- Link to v1: https://lore.kernel.org/all/20250515085114.1692-1-hehuan1@eswincomputing.com/
Yulin Lu (3):
dt-bindings: ata: eswin: Document for EIC7700 SoC ahci
dt-bindings: phy: eswin: Document for EIC7700 SoC SATA PHY
phy: eswin: Create eswin directory and add EIC7700 SATA PHY driver
.../bindings/ata/eswin,eic7700-ahci.yaml | 80 +++++++
.../bindings/phy/eswin,eic7700-sata-phy.yaml | 36 +++
drivers/phy/Kconfig | 1 +
drivers/phy/Makefile | 1 +
drivers/phy/eswin/Kconfig | 14 ++
drivers/phy/eswin/Makefile | 2 +
drivers/phy/eswin/phy-eic7700-sata.c | 205 ++++++++++++++++++
7 files changed, 339 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/phy/eswin,eic7700-sata-phy.yaml
create mode 100644 drivers/phy/eswin/Kconfig
create mode 100644 drivers/phy/eswin/Makefile
create mode 100644 drivers/phy/eswin/phy-eic7700-sata.c
--
2.25.1
next reply other threads:[~2025-09-04 6:34 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-04 6:34 Yulin Lu [this message]
2025-09-04 6:37 ` [PATCH v3 1/3] dt-bindings: ata: eswin: Document for EIC7700 SoC ahci Yulin Lu
2025-09-04 7:10 ` Krzysztof Kozlowski
2025-09-04 9:14 ` Niklas Cassel
2025-09-04 9:50 ` Krzysztof Kozlowski
2025-09-05 7:23 ` luyulin
2025-09-04 6:38 ` [PATCH v3 2/3] dt-bindings: phy: eswin: Document for EIC7700 SoC SATA PHY Yulin Lu
2025-09-04 7:11 ` Krzysztof Kozlowski
2025-09-04 6:38 ` [PATCH v3 3/3] phy: eswin: Create eswin directory and add EIC7700 SATA PHY driver Yulin Lu
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