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From: Andre Przywara <andre.przywara@arm.com>
To: Chen-Yu Tsai <wens@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Stephen Boyd <sboyd@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej@kernel.org>,
	Samuel Holland <samuel@sholland.org>,
	linux-sunxi@lists.linux.dev, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/8] clk: sunxi-ng: sun55i-a523-ccu: Add missing NPU module clock
Date: Fri, 5 Sep 2025 16:14:18 +0100	[thread overview]
Message-ID: <20250905161418.30562637@donnerap> (raw)
In-Reply-To: <20250830170901.1996227-5-wens@kernel.org>

On Sun, 31 Aug 2025 01:08:57 +0800
Chen-Yu Tsai <wens@kernel.org> wrote:

Hi,

> From: Chen-Yu Tsai <wens@csie.org>
> 
> The main clock controller on the A523/T527 has the NPU's module clock.
> It was missing from the original submission, likely because that was
> based on the A523 user manual; the A523 is marketed without the NPU.

Ah, sorry, I missed that one. I think I spotted writable bits in that
register, but didn't find a clue what this clock was about. Anyway, checked
the bits against the T527 manual, they match up.

> Also, merge the private header back into the driver code itself. The
> header only contains a macro containing the total number of clocks.
> This has to be updated every time a missing clock gets added. Having
> it in a separate file doesn't help the process. Instead just drop the
> macro, and thus the header no longer has any reason to exist.

Interesting, looks nice, and solves Krzysztof's complaint the other
day about the binding header inclusion missing from the driver as well.
Just one thought:

> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  drivers/clk/sunxi-ng/ccu-sun55i-a523.c | 21 ++++++++++++++++++---
>  drivers/clk/sunxi-ng/ccu-sun55i-a523.h | 14 --------------
>  2 files changed, 18 insertions(+), 17 deletions(-)
>  delete mode 100644 drivers/clk/sunxi-ng/ccu-sun55i-a523.h
> 
> diff --git a/drivers/clk/sunxi-ng/ccu-sun55i-a523.c b/drivers/clk/sunxi-ng/ccu-sun55i-a523.c
> index 1a9a1cb869e2..88405b624dc5 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun55i-a523.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun55i-a523.c
> @@ -11,6 +11,9 @@
>  #include <linux/module.h>
>  #include <linux/platform_device.h>
>  
> +#include <dt-bindings/clock/sun55i-a523-ccu.h>
> +#include <dt-bindings/reset/sun55i-a523-ccu.h>
> +

Should we have the number #define here, at a more central location? Seems a
bit buried down in there. And then use a plural name while at it:

#define NUM_CLOCKS	CLK_NPU + 1

Alternatively, put .num behind .hws below, so that the last clock and the
number definition are close together?

Cheers,
Andre

>  #include "../clk.h"
>  
>  #include "ccu_common.h"
> @@ -25,8 +28,6 @@
>  #include "ccu_nkmp.h"
>  #include "ccu_nm.h"
>  
> -#include "ccu-sun55i-a523.h"
> -
>  /*
>   * The 24 MHz oscillator, the root of most of the clock tree.
>   * .fw_name is the string used in the DT "clock-names" property, used to
> @@ -486,6 +487,18 @@ static SUNXI_CCU_M_HW_WITH_MUX_GATE(ve_clk, "ve", ve_parents, 0x690,
>  
>  static SUNXI_CCU_GATE_HWS(bus_ve_clk, "bus-ve", ahb_hws, 0x69c, BIT(0), 0);
>  
> +static const struct clk_hw *npu_parents[] = {
> +	&pll_periph0_480M_clk.common.hw,
> +	&pll_periph0_600M_clk.hw,
> +	&pll_periph0_800M_clk.common.hw,
> +	&pll_npu_2x_clk.hw,
> +};
> +static SUNXI_CCU_M_HW_WITH_MUX_GATE(npu_clk, "npu", npu_parents, 0x6e0,
> +				    0, 5,	/* M */
> +				    24, 3,	/* mux */
> +				    BIT(31),	/* gate */
> +				    CLK_SET_RATE_PARENT);
> +
>  static SUNXI_CCU_GATE_HWS(bus_dma_clk, "bus-dma", ahb_hws, 0x70c, BIT(0), 0);
>  
>  static SUNXI_CCU_GATE_HWS(bus_msgbox_clk, "bus-msgbox", ahb_hws, 0x71c,
> @@ -1217,6 +1230,7 @@ static struct ccu_common *sun55i_a523_ccu_clks[] = {
>  	&bus_ce_sys_clk.common,
>  	&ve_clk.common,
>  	&bus_ve_clk.common,
> +	&npu_clk.common,
>  	&bus_dma_clk.common,
>  	&bus_msgbox_clk.common,
>  	&bus_spinlock_clk.common,
> @@ -1343,7 +1357,7 @@ static struct ccu_common *sun55i_a523_ccu_clks[] = {
>  };
>  
>  static struct clk_hw_onecell_data sun55i_a523_hw_clks = {
> -	.num	= CLK_NUMBER,
> +	.num	= CLK_NPU + 1,
>  	.hws	= {
>  		[CLK_PLL_DDR0]		= &pll_ddr_clk.common.hw,
>  		[CLK_PLL_PERIPH0_4X]	= &pll_periph0_4x_clk.common.hw,
> @@ -1524,6 +1538,7 @@ static struct clk_hw_onecell_data sun55i_a523_hw_clks = {
>  		[CLK_FANOUT0]		= &fanout0_clk.common.hw,
>  		[CLK_FANOUT1]		= &fanout1_clk.common.hw,
>  		[CLK_FANOUT2]		= &fanout2_clk.common.hw,
> +		[CLK_NPU]		= &npu_clk.common.hw,
>  	},
>  };
>  
> diff --git a/drivers/clk/sunxi-ng/ccu-sun55i-a523.h b/drivers/clk/sunxi-ng/ccu-sun55i-a523.h
> deleted file mode 100644
> index fc8dd42f1b47..000000000000
> --- a/drivers/clk/sunxi-ng/ccu-sun55i-a523.h
> +++ /dev/null
> @@ -1,14 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0 */
> -/*
> - * Copyright 2024 Arm Ltd.
> - */
> -
> -#ifndef _CCU_SUN55I_A523_H
> -#define _CCU_SUN55I_A523_H
> -
> -#include <dt-bindings/clock/sun55i-a523-ccu.h>
> -#include <dt-bindings/reset/sun55i-a523-ccu.h>
> -
> -#define CLK_NUMBER	(CLK_FANOUT2 + 1)
> -
> -#endif /* _CCU_SUN55I_A523_H */


  reply	other threads:[~2025-09-05 15:14 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-30 17:08 [PATCH 0/8] arm64: allwinner: a523: Enable MCU PRCM and NPU Chen-Yu Tsai
2025-08-30 17:08 ` [PATCH 1/8] dt-bindings: clock: sun55i-a523-ccu: Add missing NPU module clock Chen-Yu Tsai
2025-09-01 21:29   ` Rob Herring (Arm)
2025-09-05 15:12   ` Andre Przywara
2025-08-30 17:08 ` [PATCH 2/8] dt-bindings: clock: sun55i-a523-ccu: Add A523 MCU CCU clock controller Chen-Yu Tsai
2025-09-01 21:31   ` Rob Herring (Arm)
2025-08-30 17:08 ` [PATCH 3/8] clk: sunxi-ng: mp: Fix dual-divider clock rate readback Chen-Yu Tsai
2025-09-05 15:12   ` Andre Przywara
2025-09-05 15:17     ` Chen-Yu Tsai
2025-08-30 17:08 ` [PATCH 4/8] clk: sunxi-ng: sun55i-a523-ccu: Add missing NPU module clock Chen-Yu Tsai
2025-09-05 15:14   ` Andre Przywara [this message]
2025-09-05 15:19     ` Chen-Yu Tsai
2025-08-30 17:08 ` [PATCH 5/8] clk: sunxi-ng: div: support power-of-two dividers Chen-Yu Tsai
2025-08-30 17:08 ` [PATCH 6/8] clk: sunxi-ng: add support for the A523/T527 MCU CCU Chen-Yu Tsai
2025-09-05 15:14   ` Andre Przywara
2025-09-05 16:13     ` Chen-Yu Tsai
2025-09-05 17:21       ` Andre Przywara
2025-08-30 17:09 ` [PATCH 7/8] arm64: dts: allwinner: a523: Add MCU PRCM CCU node Chen-Yu Tsai
2025-09-05 15:14   ` Andre Przywara
2025-08-30 17:09 ` [PATCH 8/8] arm64: dts: allwinner: a523: Add NPU device node Chen-Yu Tsai
2025-09-05 15:14   ` Andre Przywara

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