From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 56B5E2F7ACB; Fri, 5 Sep 2025 15:14:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757085283; cv=none; b=qGgfLHeoKohziFcMhjHtj7bjRTMhzqjvG7j+B+aXDo0TlAK7UMw6kUMXexKBHSGI2trirqaB7oeJqTXFaxvXo41W04RUfZ80+sw0qCOdBrwzWHBCemcxr9s2IpZBx9X3zhyXch8O6IbIJwqiURRH9kX2/Nv9AE08rFOgQ2J7ye0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757085283; c=relaxed/simple; bh=YBoQ0jb9BkWrIvQ0QHQzRC1HHRALUcH/V91HeU2Y3mc=; h=Date:From:To:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=PXATZCaqlEKh25IARShIic/aMbL/nnonFVzuXsMQH6KvptFRnVUvSEuaQWrBdUpaDg3/KSrnnSQS+4OOSQqWU0Xn9bbDhYbokCzTculVKUwlcmIcIZgIbicKtb5f1Rh9fKTgHRL1aJHQVnSBwejUYnxVIqSHylEVD+J97ySSJMU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 72134152B; Fri, 5 Sep 2025 08:14:33 -0700 (PDT) Received: from donnerap (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DAEA23F6A8; Fri, 5 Sep 2025 08:14:39 -0700 (PDT) Date: Fri, 5 Sep 2025 16:14:37 +0100 From: Andre Przywara To: Chen-Yu Tsai Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stephen Boyd , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , linux-sunxi@lists.linux.dev, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 7/8] arm64: dts: allwinner: a523: Add MCU PRCM CCU node Message-ID: <20250905161437.1a164745@donnerap> In-Reply-To: <20250830170901.1996227-8-wens@kernel.org> References: <20250830170901.1996227-1-wens@kernel.org> <20250830170901.1996227-8-wens@kernel.org> Organization: ARM X-Mailer: Claws Mail 3.18.0 (GTK+ 2.24.32; aarch64-unknown-linux-gnu) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Sun, 31 Aug 2025 01:09:00 +0800 Chen-Yu Tsai wrote: > From: Chen-Yu Tsai > > Add a device node for the third supported clock controller found in the > A523 / T527 SoCs. This controller has clocks and resets for the RISC-V > MCU, and others peripherals possibly meant to operate in low power mode > driven by the MCU, such as audio interfaces, an audio DSP, and the NPU. > > Signed-off-by: Chen-Yu Tsai > --- > .../arm64/boot/dts/allwinner/sun55i-a523.dtsi | 25 +++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi > index 79bd9ce08c7c..b6e82d53af54 100644 > --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi > @@ -4,8 +4,10 @@ > #include > #include > #include > +#include > #include > #include > +#include > #include > #include > #include > @@ -825,6 +827,29 @@ rtc: rtc@7090000 { > clock-names = "bus", "hosc", "ahb"; > #clock-cells = <1>; > }; > + > + mcu_ccu: clock-controller@7102000 { > + compatible = "allwinner,sun55i-a523-mcu-ccu"; > + reg = <0x7102000 0x164>; There is a register at 0x164, and even though the Linux driver doesn't use it, we should let the region cover it. Maybe even going to 0x200? The clock names match up with those .fw_name used in the driver, so with the region size fixed: Reviewed-by: Andre Przywara Cheers, Andre > + clocks = <&osc24M>, > + <&rtc CLK_OSC32K>, > + <&rtc CLK_IOSC>, > + <&ccu CLK_PLL_AUDIO0_4X>, > + <&ccu CLK_PLL_PERIPH0_300M>, > + <&ccu CLK_DSP>, > + <&r_ccu CLK_R_AHB>, > + <&ccu CLK_MBUS>; > + clock-names = "hosc", > + "losc", > + "iosc", > + "pll-audio0-4x", > + "pll-periph0-300m", > + "dsp", > + "r-ahb", > + "mbus"; > + #clock-cells = <1>; > + #reset-cells = <1>; > + }; > }; > > thermal-zones {