From: Rob Herring <robh@kernel.org>
To: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Cc: AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Boris Brezillon <boris.brezillon@collabora.com>,
Steven Price <steven.price@arm.com>,
Liviu Dudau <liviu.dudau@arm.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Jassi Brar <jassisinghbrar@gmail.com>,
Kees Cook <kees@kernel.org>,
"Gustavo A. R. Silva" <gustavoars@kernel.org>,
Chia-I Wu <olvaffe@gmail.com>, Chen-Yu Tsai <wenst@chromium.org>,
kernel@collabora.com, dri-devel@lists.freedesktop.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org,
linux-hardening@vger.kernel.org
Subject: Re: [PATCH RFC 04/10] dt-bindings: mailbox: Add MT8196 GPUEB Mailbox
Date: Fri, 5 Sep 2025 18:31:03 -0500 [thread overview]
Message-ID: <20250905233103.GA1508406-robh@kernel.org> (raw)
In-Reply-To: <20250905-mt8196-gpufreq-v1-4-7b6c2d6be221@collabora.com>
On Fri, Sep 05, 2025 at 12:23:00PM +0200, Nicolas Frattaroli wrote:
> The MediaTek MT8196 SoC includes an embedded MCU referred to as "GPUEB",
> acting as glue logic to control power and frequency of the Mali GPU.
> This MCU runs proprietary firmware for this purpose, and the main
> application processor communicates with it through a mailbox.
>
> Add a binding that describes this mailbox.
>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> ---
> .../mailbox/mediatek,mt8196-gpueb-mbox.yaml | 64 ++++++++++++++++++++++
> 1 file changed, 64 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpueb-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpueb-mbox.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..506723d54ae0a429b462914f3666184c24c4fc5a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpueb-mbox.yaml
> @@ -0,0 +1,64 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mailbox/mediatek,mt8196-gpueb-mbox.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek MFlexGraphics GPUEB Mailbox Controller
> +
> +maintainers:
> + - Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> +
> +properties:
> + compatible:
> + enum:
> + - mediatek,mt8196-gpueb-mbox
> +
> + reg:
> + items:
> + - description: mailbox data registers
> + - description: mailbox control registers
> +
> + reg-names:
> + items:
> + - const: mbox
> + - const: mbox_ctl
'mbox' is redundant. So 'data' and 'ctl'?
> +
> + clocks:
> + items:
> + - description: main clock of the GPUEB MCU
> +
> + interrupts:
> + items:
> + - description: fires when a new message is received
> +
> + "#mbox-cells":
> + const: 1
> + description:
> + The number of the mailbox channel.
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - clocks
> + - interrupts
> + - "#mbox-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/mediatek,mt8196-clock.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> +
> + gpueb_mbox: mailbox@4b09fd80 {
Drop unused labels.
> + compatible = "mediatek,mt8196-gpueb-mbox";
> + reg = <0x4b09fd80 0x280>,
> + <0x4b170000 0x7c>;
> + reg-names = "mbox", "mbox_ctl";
> + clocks = <&topckgen CLK_TOP_MFG_EB>;
> + interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH 0>;
> + #mbox-cells = <1>;
> + };
>
> --
> 2.51.0
>
next prev parent reply other threads:[~2025-09-05 23:31 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-05 10:22 [PATCH RFC 00/10] MT8196 GPU Frequency/Power Control Support Nicolas Frattaroli
2025-09-05 10:22 ` [PATCH RFC 01/10] dt-bindings: gpu: mali-valhall-csf: add mediatek,mt8196-mali variant Nicolas Frattaroli
2025-09-05 23:26 ` Rob Herring
2025-09-06 17:54 ` Nicolas Frattaroli
2025-09-08 19:51 ` Liviu Dudau
2025-09-05 10:22 ` [PATCH RFC 02/10] dt-bindings: devfreq: add mt8196-gpufreq binding Nicolas Frattaroli
2025-09-08 11:15 ` AngeloGioacchino Del Regno
2025-09-08 11:39 ` Nicolas Frattaroli
2025-09-08 12:49 ` AngeloGioacchino Del Regno
2025-09-05 10:22 ` [PATCH RFC 03/10] dt-bindings: sram: Add compatible for mediatek,mt8196-gpufreq-sram Nicolas Frattaroli
2025-09-05 23:28 ` Rob Herring (Arm)
2025-09-05 10:23 ` [PATCH RFC 04/10] dt-bindings: mailbox: Add MT8196 GPUEB Mailbox Nicolas Frattaroli
2025-09-05 23:31 ` Rob Herring [this message]
2025-09-05 10:23 ` [PATCH RFC 05/10] mailbox: add MediaTek GPUEB IPI mailbox Nicolas Frattaroli
2025-09-08 10:06 ` AngeloGioacchino Del Regno
2025-09-08 12:05 ` Nicolas Frattaroli
2025-09-08 12:34 ` AngeloGioacchino Del Regno
2025-09-12 4:48 ` Chia-I Wu
2025-09-12 6:11 ` Chen-Yu Tsai
2025-09-12 10:59 ` Nicolas Frattaroli
2025-09-12 17:30 ` Chia-I Wu
2025-09-05 10:23 ` [PATCH RFC 06/10] drm/panthor: call into devfreq for current frequency Nicolas Frattaroli
2025-09-10 13:59 ` Steven Price
2025-09-05 10:23 ` [PATCH RFC 07/10] drm/panthor: move panthor_devfreq struct to header Nicolas Frattaroli
2025-09-10 13:59 ` Steven Price
2025-09-05 10:23 ` [PATCH RFC 08/10] drm/panthor: devfreq: expose get_dev_status and make it more generic Nicolas Frattaroli
2025-09-10 13:59 ` Steven Price
2025-09-05 10:23 ` [PATCH RFC 09/10] drm/panthor: devfreq: add pluggable devfreq providers Nicolas Frattaroli
2025-09-10 13:59 ` Steven Price
2025-09-05 10:23 ` [PATCH RFC 10/10] drm/panthor: add support for MediaTek MFlexGraphics Nicolas Frattaroli
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