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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7723f4858e6sm24285076b3a.4.2025.09.07.19.02.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 Sep 2025 19:02:40 -0700 (PDT) From: Jie Gan Date: Mon, 08 Sep 2025 10:01:55 +0800 Subject: [PATCH v6 3/9] coresight: tmc: add etr_buf_list to store allocated etr_buf Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250908-enable-byte-cntr-for-tmc-v6-3-1db9e621441a@oss.qualcomm.com> References: <20250908-enable-byte-cntr-for-tmc-v6-0-1db9e621441a@oss.qualcomm.com> In-Reply-To: <20250908-enable-byte-cntr-for-tmc-v6-0-1db9e621441a@oss.qualcomm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Alexander Shishkin , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tingwei Zhang , Jinlong Mao , Bjorn Andersson , Konrad Dybcio Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Jie Gan X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757296940; l=2488; i=jie.gan@oss.qualcomm.com; s=20240927; h=from:subject:message-id; bh=J8gJ/mYXIto4Pqb6SCiL46R3ybLriqfOejLtEnfdnig=; b=7C7yn707Lsimdprw0DZkaDMCHAqIYdRQAOXnK0GeVx7h8jA1BavXgvNmroqj+Ox8oukZ3q3IE b4gs6HH1T8nDbUL+jeKB7WQNVjNywsynjftCQ/HYJnMCIIOvMK2M6Wu X-Developer-Key: i=jie.gan@oss.qualcomm.com; a=ed25519; pk=OZh7JyRifqJh4xmrcGgmwa8/LCS8O11Q+mtx4aZGmi4= X-Authority-Analysis: v=2.4 cv=H7Dbw/Yi c=1 sm=1 tr=0 ts=68be3942 cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=KKaT4joegMVsfAxsIjQA:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-GUID: pt59KaSuKckEI-esD58ueNUIEycQjTxe X-Proofpoint-ORIG-GUID: pt59KaSuKckEI-esD58ueNUIEycQjTxe X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTA2MDAzOSBTYWx0ZWRfX67HB6Hxn5m1+ 19vY1Akyy3CKrMXIJeRpMYiheIraDNrPOkbj9OLOT0EIZ9r1Yvby2fNaSg5rpZnZTbjxw6RQpzg 5+uXgLQHnkAaJaIquQRqgZSN1vq4orzPq9YlArEBNwjfMzmdmtEEl2l1apvQJrCh7fhYHhJS9vL 7j1k3FmLc2JifTbpYUD45oOa7iLh/JKLPxvzpcL+8Cs+IDQCcUQ0i3PPXP9of1hD2LMavm/cFkx OEaGxIGT2NUf4DKgLL3+CLwamD4Qfd3uPR7oGyd+T7ngnm7/JqtkHCxOLdvIRFETEy2iHUMJYKn 9m9c/7VE2wlQZSahsJ4nRXraU/OYRy8f5SrTIo06WE9W1jwny8tieQF61YvhoopI6qNgDJguPtb iHdBSM55 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-07_10,2025-09-04_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 impostorscore=0 adultscore=0 phishscore=0 clxscore=1015 suspectscore=0 priorityscore=1501 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509060039 Add a list to store allocated etr_buf. The byte-cntr functionality requires two etr_buf to receive trace data. The active etr_buf collects the trace data from source device, while the byte-cntr reading function accesses the deactivated etr_buf after is has been filled and synced, transferring data to the userspace. Signed-off-by: Jie Gan --- drivers/hwtracing/coresight/coresight-tmc-core.c | 1 + drivers/hwtracing/coresight/coresight-tmc.h | 17 +++++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwtracing/coresight/coresight-tmc-core.c index be964656be93..4d249af93097 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -830,6 +830,7 @@ static int __tmc_probe(struct device *dev, struct resource *res) idr_init(&drvdata->idr); mutex_init(&drvdata->idr_mutex); dev_list = &etr_devs; + INIT_LIST_HEAD(&drvdata->etr_buf_list); break; case TMC_CONFIG_TYPE_ETF: desc.groups = coresight_etf_groups; diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index 6541a27a018e..292e25d82b62 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -208,6 +208,19 @@ struct tmc_resrv_buf { s64 len; }; +/** + * @sysfs_buf: Allocated sysfs_buf. + * @is_free: Indicates whether the buffer is free to choose. + * @pos: Position of the buffer. + * @node: Node in etr_buf_list. + */ +struct etr_buf_node { + struct etr_buf *sysfs_buf; + bool is_free; + loff_t pos; + struct list_head node; +}; + /** * struct tmc_drvdata - specifics associated to an TMC component * @pclk: APB clock if present, otherwise NULL @@ -242,6 +255,8 @@ struct tmc_resrv_buf { * (after crash) by default. * @crash_mdata: Reserved memory for storing tmc crash metadata. * Used by ETR/ETF. + * @etr_buf_list: List that is used to manage allocated etr_buf. + * @reading_node: Available buffer for byte-cntr reading. */ struct tmc_drvdata { struct clk *pclk; @@ -271,6 +286,8 @@ struct tmc_drvdata { struct etr_buf *perf_buf; struct tmc_resrv_buf resrv_buf; struct tmc_resrv_buf crash_mdata; + struct list_head etr_buf_list; + struct etr_buf_node *reading_node; }; struct etr_buf_operations { -- 2.34.1