* [PATCH v1 3/3] pinctrl: samsung: add exynos8890 SoC pinctrl configuration
2025-09-14 11:44 [PATCH v1 0/3] pinctrl: samsung: add exynos8890 SoC pinctrl Ivaylo Ivanov
2025-09-14 11:44 ` [PATCH v1 1/3] dt-bindings: pinctrl: samsung: add exynos8890 compatible Ivaylo Ivanov
2025-09-14 11:44 ` [PATCH v1 2/3] dt-bindings: pinctrl: samsung: add exynos8890-wakeup-eint compatible Ivaylo Ivanov
@ 2025-09-14 11:44 ` Ivaylo Ivanov
2025-09-14 15:30 ` Igor Belwon
2025-10-10 12:35 ` [PATCH v1 0/3] pinctrl: samsung: add exynos8890 SoC pinctrl Krzysztof Kozlowski
2025-10-13 0:22 ` Krzysztof Kozlowski
4 siblings, 1 reply; 8+ messages in thread
From: Ivaylo Ivanov @ 2025-09-14 11:44 UTC (permalink / raw)
To: Krzysztof Kozlowski, Sylwester Nawrocki, Alim Akhtar,
Linus Walleij, Rob Herring, Conor Dooley, Tomasz Figa
Cc: linux-samsung-soc, devicetree, linux-gpio, linux-arm-kernel,
linux-kernel
Add support for the pin-controller found on the exynos8890 SoC, used in
Samsung Galaxy S7.
Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
---
.../pinctrl/samsung/pinctrl-exynos-arm64.c | 157 ++++++++++++++++++
drivers/pinctrl/samsung/pinctrl-samsung.c | 2 +
drivers/pinctrl/samsung/pinctrl-samsung.h | 1 +
3 files changed, 160 insertions(+)
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
index 5fe7c4b9f..901047a72 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
@@ -1476,6 +1476,163 @@ const struct samsung_pinctrl_of_match_data exynosautov920_of_data __initconst =
.num_ctrl = ARRAY_SIZE(exynosautov920_pin_ctrl),
};
+/* pin banks of exynos8890 pin-controller 0 (ALIVE) */
+static const struct samsung_pin_bank_data exynos8890_pin_banks0[] __initconst = {
+ /* Must start with EINTG banks, ordered by EINT group number. */
+ EXYNOS7870_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
+ EXYNOS7870_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
+ EXYNOS7870_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
+ EXYNOS7870_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
+};
+
+/* pin banks of exynos8890 pin-controller 1 (AUD) */
+static const struct samsung_pin_bank_data exynos8890_pin_banks1[] __initconst = {
+ /* Must start with EINTG banks, ordered by EINT group number. */
+ EXYNOS8895_PIN_BANK_EINTG(7, 0x000, "gph0", 0x00),
+};
+
+/* pin banks of exynos8890 pin-controller 2 (CCORE) */
+static const struct samsung_pin_bank_data exynos8890_pin_banks2[] __initconst = {
+ /* Must start with EINTG banks, ordered by EINT group number. */
+ EXYNOS8895_PIN_BANK_EINTG(2, 0x000, "etc0", 0x00),
+};
+
+/* pin banks of exynos8890 pin-controller 3 (ESE) */
+static const struct samsung_pin_bank_data exynos8890_pin_banks3[] __initconst = {
+ /* Must start with EINTG banks, ordered by EINT group number. */
+ EXYNOS8895_PIN_BANK_EINTG(5, 0x000, "gpf3", 0x00),
+};
+
+/* pin banks of exynos8890 pin-controller 4 (FP) */
+static const struct samsung_pin_bank_data exynos8890_pin_banks4[] __initconst = {
+ /* Must start with EINTG banks, ordered by EINT group number. */
+ EXYNOS8895_PIN_BANK_EINTG(4, 0x000, "gpf2", 0x00),
+};
+
+/* pin banks of exynos8890 pin-controller 5 (FSYS0) */
+static const struct samsung_pin_bank_data exynos8890_pin_banks5[] __initconst = {
+ /* Must start with EINTG banks, ordered by EINT group number. */
+ EXYNOS8895_PIN_BANK_EINTG(4, 0x000, "gpi1", 0x00),
+ EXYNOS8895_PIN_BANK_EINTG(8, 0x020, "gpi2", 0x04),
+};
+
+/* pin banks of exynos8890 pin-controller 6 (FSYS1) */
+static const struct samsung_pin_bank_data exynos8890_pin_banks6[] __initconst = {
+ /* Must start with EINTG banks, ordered by EINT group number. */
+ EXYNOS8895_PIN_BANK_EINTG(7, 0x000, "gpj0", 0x00),
+};
+
+/* pin banks of exynos8890 pin-controller 7 (NFC) */
+static const struct samsung_pin_bank_data exynos8890_pin_banks7[] __initconst = {
+ /* Must start with EINTG banks, ordered by EINT group number. */
+ EXYNOS8895_PIN_BANK_EINTG(3, 0x000, "gpf0", 0x00),
+};
+
+/* pin banks of exynos8890 pin-controller 8 (PERIC0) */
+static const struct samsung_pin_bank_data exynos8890_pin_banks8[] __initconst = {
+ /* Must start with EINTG banks, ordered by EINT group number. */
+ EXYNOS8895_PIN_BANK_EINTG(6, 0x000, "gpi0", 0x00),
+ EXYNOS8895_PIN_BANK_EINTG(8, 0x020, "gpd0", 0x04),
+ EXYNOS8895_PIN_BANK_EINTG(6, 0x040, "gpd1", 0x08),
+ EXYNOS8895_PIN_BANK_EINTG(4, 0x060, "gpd2", 0x0c),
+ EXYNOS8895_PIN_BANK_EINTG(4, 0x080, "gpd3", 0x10),
+ EXYNOS8895_PIN_BANK_EINTG(2, 0x0A0, "gpb1", 0x14),
+ EXYNOS8895_PIN_BANK_EINTG(2, 0x0C0, "gpb2", 0x18),
+ EXYNOS8895_PIN_BANK_EINTG(3, 0x0E0, "gpb0", 0x1c),
+ EXYNOS8895_PIN_BANK_EINTG(5, 0x100, "gpc0", 0x20),
+ EXYNOS8895_PIN_BANK_EINTG(5, 0x120, "gpc1", 0x24),
+ EXYNOS8895_PIN_BANK_EINTG(6, 0x140, "gpc2", 0x28),
+ EXYNOS8895_PIN_BANK_EINTG(8, 0x160, "gpc3", 0x2c),
+ EXYNOS8895_PIN_BANK_EINTG(4, 0x180, "gpk0", 0x30),
+ EXYNOS8895_PIN_BANK_EINTG(7, 0x1A0, "etc1", 0x34),
+};
+
+/* pin banks of exynos8890 pin-controller 9 (PERIC1) */
+static const struct samsung_pin_bank_data exynos8890_pin_banks9[] __initconst = {
+ /* Must start with EINTG banks, ordered by EINT group number. */
+ EXYNOS8895_PIN_BANK_EINTG(8, 0x000, "gpe0", 0x00),
+ EXYNOS8895_PIN_BANK_EINTG(8, 0x020, "gpe5", 0x04),
+ EXYNOS8895_PIN_BANK_EINTG(8, 0x040, "gpe6", 0x08),
+ EXYNOS8895_PIN_BANK_EINTG(8, 0x060, "gpj1", 0x0c),
+ EXYNOS8895_PIN_BANK_EINTG(2, 0x080, "gpj2", 0x10),
+ EXYNOS8895_PIN_BANK_EINTG(8, 0x0A0, "gpe2", 0x14),
+ EXYNOS8895_PIN_BANK_EINTG(8, 0x0C0, "gpe3", 0x18),
+ EXYNOS8895_PIN_BANK_EINTG(8, 0x0E0, "gpe4", 0x1c),
+ EXYNOS8895_PIN_BANK_EINTG(8, 0x100, "gpe1", 0x20),
+ EXYNOS8895_PIN_BANK_EINTG(4, 0x120, "gpe7", 0x24),
+ EXYNOS8895_PIN_BANK_EINTG(3, 0x140, "gpg0", 0x28),
+};
+
+/* pin banks of exynos8890 pin-controller 10 (TOUCH) */
+static const struct samsung_pin_bank_data exynos8890_pin_banks10[] __initconst = {
+ /* Must start with EINTG banks, ordered by EINT group number. */
+ EXYNOS8895_PIN_BANK_EINTG(3, 0x000, "gpf1", 0x00),
+};
+
+static const struct samsung_pin_ctrl exynos8890_pin_ctrl[] __initconst = {
+ {
+ /* pin-controller instance 0 Alive data */
+ .pin_banks = exynos8890_pin_banks0,
+ .nr_banks = ARRAY_SIZE(exynos8890_pin_banks0),
+ .eint_wkup_init = exynos_eint_wkup_init,
+ }, {
+ /* pin-controller instance 1 AUD data */
+ .pin_banks = exynos8890_pin_banks1,
+ .nr_banks = ARRAY_SIZE(exynos8890_pin_banks1),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ }, {
+ /* pin-controller instance 2 CCORE data */
+ .pin_banks = exynos8890_pin_banks2,
+ .nr_banks = ARRAY_SIZE(exynos8890_pin_banks2),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ }, {
+ /* pin-controller instance 3 ESE data */
+ .pin_banks = exynos8890_pin_banks3,
+ .nr_banks = ARRAY_SIZE(exynos8890_pin_banks3),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ }, {
+ /* pin-controller instance 4 FP data */
+ .pin_banks = exynos8890_pin_banks4,
+ .nr_banks = ARRAY_SIZE(exynos8890_pin_banks4),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ }, {
+ /* pin-controller instance 5 FSYS0 data */
+ .pin_banks = exynos8890_pin_banks5,
+ .nr_banks = ARRAY_SIZE(exynos8890_pin_banks5),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ }, {
+ /* pin-controller instance 6 FSYS1 data */
+ .pin_banks = exynos8890_pin_banks6,
+ .nr_banks = ARRAY_SIZE(exynos8890_pin_banks6),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ }, {
+ /* pin-controller instance 7 NFC data */
+ .pin_banks = exynos8890_pin_banks7,
+ .nr_banks = ARRAY_SIZE(exynos8890_pin_banks7),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ }, {
+ /* pin-controller instance 8 PERIC0 data */
+ .pin_banks = exynos8890_pin_banks8,
+ .nr_banks = ARRAY_SIZE(exynos8890_pin_banks8),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ }, {
+ /* pin-controller instance 9 PERIC1 data */
+ .pin_banks = exynos8890_pin_banks9,
+ .nr_banks = ARRAY_SIZE(exynos8890_pin_banks9),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ }, {
+ /* pin-controller instance 10 TOUCH data */
+ .pin_banks = exynos8890_pin_banks10,
+ .nr_banks = ARRAY_SIZE(exynos8890_pin_banks10),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ },
+};
+
+const struct samsung_pinctrl_of_match_data exynos8890_of_data __initconst = {
+ .ctrl = exynos8890_pin_ctrl,
+ .num_ctrl = ARRAY_SIZE(exynos8890_pin_ctrl),
+};
+
/* pin banks of exynos8895 pin-controller 0 (ALIVE) */
static const struct samsung_pin_bank_data exynos8895_pin_banks0[] __initconst = {
EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa0", 0x00),
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c
index 24745e1d7..f58b7b10f 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.c
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.c
@@ -1496,6 +1496,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = {
.data = &exynos7885_of_data },
{ .compatible = "samsung,exynos850-pinctrl",
.data = &exynos850_of_data },
+ { .compatible = "samsung,exynos8890-pinctrl",
+ .data = &exynos8890_of_data },
{ .compatible = "samsung,exynos8895-pinctrl",
.data = &exynos8895_of_data },
{ .compatible = "samsung,exynos9810-pinctrl",
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h
index 1cabcbe14..4236d7ad8 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.h
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.h
@@ -394,6 +394,7 @@ extern const struct samsung_pinctrl_of_match_data exynos7_of_data;
extern const struct samsung_pinctrl_of_match_data exynos7870_of_data;
extern const struct samsung_pinctrl_of_match_data exynos7885_of_data;
extern const struct samsung_pinctrl_of_match_data exynos850_of_data;
+extern const struct samsung_pinctrl_of_match_data exynos8890_of_data;
extern const struct samsung_pinctrl_of_match_data exynos8895_of_data;
extern const struct samsung_pinctrl_of_match_data exynos9810_of_data;
extern const struct samsung_pinctrl_of_match_data exynos990_of_data;
--
2.43.0
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