Re: [PATCH 2/4] i3c: mipi-i3c-hci: add microchip sama7d65 SoC

Jarkko Nikula
2025-09-25T13:23:15Z

Hi

On 9/18/25 7:27 PM, Frank Li wrote:
> On Thu, Sep 18, 2025 at 03:24:27PM +0530, Durai Manickam KR wrote:
>> Add support for microchip sama7d65 SoC I3C HCI master only IP.
>> Features tested and supported :
>> Standard CCC commands.
>> I3C SDR mode private transfers in PIO mode.
>> I2C transfers in PIO mode.
>> Pure bus mode and mixed bus mode.
>>
>> Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
>> ---
>> drivers/i3c/master/mipi-i3c-hci/Makefile | 3 +-
>> drivers/i3c/master/mipi-i3c-hci/core.c | 28 ++++++++++++
>> drivers/i3c/master/mipi-i3c-hci/hci.h | 12 ++++++
>> .../i3c/master/mipi-i3c-hci/hci_quirks_mchp.c | 43 +++++++++++++++++++
>> 4 files changed, 85 insertions(+), 1 deletion(-)
>> create mode 100644 drivers/i3c/master/mipi-i3c-hci/hci_quirks_mchp.c
>>
>> diff --git a/drivers/i3c/master/mipi-i3c-hci/Makefile b/drivers/i3c/master/mipi-i3c-hci/Makefile
>> index e3d3ef757035..f463afc4566a 100644
>> --- a/drivers/i3c/master/mipi-i3c-hci/Makefile
>> +++ b/drivers/i3c/master/mipi-i3c-hci/Makefile
>> @@ -4,5 +4,6 @@ obj-$(CONFIG_MIPI_I3C_HCI) += mipi-i3c-hci.o
>> mipi-i3c-hci-y := core.o ext_caps.o pio.o dma.o \
>> cmd_v1.o cmd_v2.o \
>> dat_v1.o dct_v1.o \
>> - hci_quirks.o
>> + hci_quirks.o \
>> + hci_quirks_mchp.o
>> obj-$(CONFIG_MIPI_I3C_HCI_PCI) += mipi-i3c-hci-pci.o
>> diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c
>> index 60f1175f1f37..cb0673d62c03 100644
>> --- a/drivers/i3c/master/mipi-i3c-hci/core.c
>> +++ b/drivers/i3c/master/mipi-i3c-hci/core.c
>> @@ -8,6 +8,7 @@
>> */
>>
>> #include <linux/bitfield.h>
>> +#include <linux/clk.h>
>> #include <linux/device.h>
>> #include <linux/errno.h>
>> #include <linux/i3c/master.h>
>> @@ -651,6 +652,9 @@ static int i3c_hci_init(struct i3c_hci *hci)
>> hci->DAT_regs = offset ? hci->base_regs + offset : NULL;
>> hci->DAT_entries = FIELD_GET(DAT_TABLE_SIZE, regval);
>> hci->DAT_entry_size = FIELD_GET(DAT_ENTRY_SIZE, regval) ? 0 : 8;
>> + /* Microchip SAMA7D65 SoC doesnot support DAT entry size bits in the DAT section offset register */
>> + if (hci->quirks & MCHP_HCI_QUIRK_SAMA7D65)
>> + hci->DAT_entry_size = 8;
>
> #define MCHP_HCI_QUIRK_FIX_DATA_ENTRY_SIZE_8
>
> if (hci->quirks & MCHP_HCI_QUIRK_FIX_DATA_ENTRY_SIZE_8)
> hci->DAT_entry_size = 8;
> else
> hci->DAT_entry_size = FIELD_GET(DAT_ENTRY_SIZE, regval) ? 0 : 8;
>
> in case other vendor have similar problem.
>
Are DAT_entry_size and DCT_entry_size quirks even needed? Does your HW
read nonzero values and you need the quirk?

>> + /* Microchip SAMA7d65 SoC supports only PIO mode */
>> + if (hci->quirks & MCHP_HCI_QUIRK_PIO_MODE)
>> + hci->RHS_regs = NULL;
>> +

Please use existing HCI_QUIRK_PIO_MODE quirk and then you don't need
this added code.