From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 833BA283FD0; Thu, 18 Sep 2025 10:40:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758192033; cv=none; b=XV0hVyPppUj/sRSyNRJts0CIX/j1/wpH3+e5KumlWbdRbg3YQrC15aymm/IMIct8ub7iWVgh9Rag/lPXhUsYzfuKpOOxk6c3PCgJ00c8orzYxApFz6JEhe7PdfsUX0WN6efUrDPThK1MnnZyNt8cbsZ1BfNiYHNVgZ7DLjkZid8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758192033; c=relaxed/simple; bh=4YhIXwqJPbNwmpsbhu8xy1qzmTDNJLBAnfzmcvidREs=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version:Content-Type; b=YPd+ot6h7Jj7ZBAWTIMeKpA9P8LSTB7l7KpHXTzXgP5eJRBB7o5tWoXVXyU9OxZYgs2yn5KnCz9NilNIrVk0PVJqhsmLEni0S3o0KMDGcKaa5LDeomwo+jugijmzt8kNVsnWi7RZT+5+7iN/EiHLTlBnCKkjWTtvMYy9pISyBS8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=zWX7evYI; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="zWX7evYI" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 88E441A0ECD; Thu, 18 Sep 2025 10:40:27 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 5670E6062C; Thu, 18 Sep 2025 10:40:27 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 95425102F1CD5; Thu, 18 Sep 2025 12:40:16 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1758192026; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding; bh=ITCUz2A7NggyDHi/klVIRUX+NYlOMzAw7ukfoXFC+/I=; b=zWX7evYIPv/l94kePGt+XODZziRiuf0WZ57y2shR7Ygt9cWpsR/nT1mn5vvjMdnbac+3Un 6Ehsxe+HY2xJ8GnnEvmnMdY0weHXDU7/kL61X4vWVKQVc51WPLmkgvOp0xObdtK8+VqxM3 skS94jpQKORAnnLAn7QTEKL0LSQp63Tdk1eXtjVBkZepn2sX3OQzavC5tL49bRj8kxer+T p5+DSykzCcYHCgqC+IQ80Fhz+I0BFWdyj77nol3U1JQf+omU+fuG/haK+yfmEQW4gMnqlA 3ubmbVpAK+FGjYpDDm39LQzoCvF6HGvUaJOeoEpw2xkKMhmqBw/nuKTRHQTjoQ== From: "Herve Codina (Schneider Electric)" To: Thomas Gleixner , Wolfram Sang , Hoan Tran , Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Saravana Kannan , Serge Semin , Herve Codina Cc: Phil Edworthy , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Pascal Eberhard , Miquel Raynal , Thomas Petazzoni Subject: [PATCH v3 0/8] gpio: renesas: Add support for GPIO and related interrupts in RZ/N1 SoC Date: Thu, 18 Sep 2025 12:39:58 +0200 Message-ID: <20250918104009.94754-1-herve.codina@bootlin.com> X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Last-TLS-Session-Version: TLSv1.3 Hi, This series adds support for GPIO and GPIO IRQ mux available in the RZ/N1 SoCs. The first patches in this series are related to a new helper introduced to parse an interrupt-map property. - patch 1: Introduce the helper (for_each_of_imap_item) - patch 2: Add a unittest for the new helper - patch 3 and 4: convert existing drivers to use this new helper Patch 4 will conflicts with commit 40c26230a1bf ("irqchip: Use int type to store negative error codes") available in linux-next. Patch 5 adds support for GPIO (device-tree description) The last patches (6, 7 and 8) of the series are related to GPIO interrupts and GPIO IRQ multiplexer. In the RZ/N1 SoCs, GPIO interrupts are wired to a GPIO IRQ multiplexer. This multiplexer does nothing but select 8 GPIO IRQ lines out of the 96 available to wire them to the GIC input lines. One upstreaming attempt have been done previously by Phil Edworthy [1] but the series has never been applied. Based on my understanding, I have fully reworked the driver proposed by Phil and removed the IRQ domain. Indeed, the device doesn't handle interrupts. It just routes signals. Also, as an interrupt-map property is used, the driver cannot be involved as an interrupt controller itself. It is a nexus node. With that in mind, - Patch 6 is related to the irq-mux binding. - Patch 7 introduces the irq-mux driver. This driver uses the 'for_each_of_imap_item' helper introduced previously. Indeed, the lines routing is defined by the interrupt-map property and the driver needs to set registers to apply this routing. - Patch 8 is the RZ/N1 device-tree description update to have the support for the GPIO interrupts. [1] https://lore.kernel.org/all/20190219155511.28507-1-phil.edworthy@renesas.com/ Best regards, Hervé Changes v2 -> v3 v2: https://lore.kernel.org/lkml/20250909120041.154459-1-herve.codina@bootlin.com/ Reordered patches as suggested by Thomas Gleixner. Patch 1: (3 in v2) - Replace a wrong 'extern' by 'static inline' in of_irq.h (detected by test robots) Patch 2: (4 in v2) Patch 3: (5 in v2) Patch 4: (6 in v2) - No changes Patch 5: (1 in v2) - Add 'Reviewed-by: Wolfram Sang' - Add 'Tested-by: Wolfram Sang' Patch 6: (2 in v2) - Add '#address-cells = <0>;' in the interrupt-controller node present in the example. Patch 7: Patch 8: - No changes Changes v1 -> v2 v1: https://lore.kernel.org/lkml/20250725152618.32886-1-herve.codina@bootlin.com/ Rebase on top of v6.17-rc5 Patch 1 in v1 - Removed in v2 (no need for RZ/N1 compatible strings). Patch 1 (2 in v1) - Fix node names (issue reported by Rob's bot) - Fix compatible RZ/N1 compatible strings - Removed undocumented and unused 'bank-name' properties Patch 2 (3 in v1) - Remove 'interrupts' property - Update 'interrupt-map' description Patch 3 (4 in v1) - Rework of_irq_foreach_imap() to provide the for_each_of_imap_item iterator (similar to for_each_of_range) Patch 4 (new in v2) - Add a unittest for for_each_of_imap_item Patch 5 (new in v2) - Convert irqchip/ls-extirq to use for_each_of_imap_item Patch 6 (new in v2) - Convert irqchip/renesas-rza1 to use for_each_of_imap_item Patch 7 (5 in v1) - Use for_each_of_imap_item - Remove 'interrupts' property usage Patch 8 (6 in v1) - Remove 'interrupts' property Herve Codina (Schneider Electric) (8): of/irq: Introduce for_each_of_imap_item of: unittest: Add a test case for for_each_of_imap_item iterator irqchip/ls-extirq: Use for_each_of_imap_item iterator irqchip/renesas-rza1: Use for_each_of_imap_item iterator ARM: dts: r9a06g032: Add GPIO controllers dt-bindings: soc: renesas: Add the Renesas RZ/N1 GPIO Interrupt Multiplexer soc: renesas: Add support for Renesas RZ/N1 GPIO Interrupt Multiplexer ARM: dts: r9a06g032: Add support for GPIO interrupts .../soc/renesas/renesas,rzn1-gpioirqmux.yaml | 87 +++++++++ arch/arm/boot/dts/renesas/r9a06g032.dtsi | 170 ++++++++++++++++++ drivers/irqchip/irq-ls-extirq.c | 47 ++--- drivers/irqchip/irq-renesas-rza1.c | 43 ++--- drivers/of/irq.c | 70 ++++++++ .../of/unittest-data/tests-interrupts.dtsi | 9 + drivers/of/unittest.c | 116 ++++++++++++ drivers/soc/renesas/Kconfig | 4 + drivers/soc/renesas/Makefile | 1 + drivers/soc/renesas/rzn1_irqmux.c | 110 ++++++++++++ include/linux/of_irq.h | 41 ++++- 11 files changed, 640 insertions(+), 58 deletions(-) create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,rzn1-gpioirqmux.yaml create mode 100644 drivers/soc/renesas/rzn1_irqmux.c -- 2.51.0