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From: Herve Codina <herve.codina@bootlin.com>
To: Wolfram Sang <wsa+renesas@sang-engineering.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Hoan Tran <hoan@os.amperecomputing.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Bartosz Golaszewski <brgl@bgdev.pl>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Magnus Damm <magnus.damm@gmail.com>,
	Saravana Kannan <saravanak@google.com>,
	Serge Semin <fancer.lancer@gmail.com>,
	Phil Edworthy <phil.edworthy@renesas.com>,
	linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	Pascal Eberhard <pascal.eberhard@se.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH v3 7/8] soc: renesas: Add support for Renesas RZ/N1 GPIO Interrupt Multiplexer
Date: Fri, 19 Sep 2025 15:14:48 +0200	[thread overview]
Message-ID: <20250919151448.14f8719a@bootlin.com> (raw)
In-Reply-To: <aM0lU01x1w2wB3LG@ninjato>

Hi Wolfram,

On Fri, 19 Sep 2025 11:41:39 +0200
Wolfram Sang <wsa+renesas@sang-engineering.com> wrote:

> Hi Herve,
> 
> > +#define IRQMUX_MAX_IRQS 8
> > +
> > +static int irqmux_setup(struct device *dev, struct device_node *np, u32 __iomem *regs)  
> 
> The whole driver would benefit from a 'rzn1_irqmux' instead of 'irqmux'
> prefix, I'd say.

Agree, I will used the 'rzn1_irqmux' prefix.

> 
> > +	for_each_of_imap_item(&imap_parser, &imap_item) {
> > +		/*
> > +		 * The child #address-cells is 0 (already checked). The first
> > +		 * value in imap item is the src hwirq.
> > +		 *
> > +		 * imap items matches 1:1 the interrupt lines that could
> > +		 * be configured by registers (same order, same number).
> > +		 * Configure the related register with the src hwirq retrieved
> > +		 * from the interrupt-map.
> > +		 */  
> 
> I haven't looked into the above for_each_of_imap_item-helper. But
> wouldn't it be possibleto retrieve the GIC_SPI number as well and use
> the correct register based on that? That would remove the need of an
> already sorted interrupt-map.

Hum, this give the knowledge of the GIC interrupt number in the driver itself.

Not sure that the mapping between the output interrupt line number N (handled
by register index N) and the GIC interrupt number X should be hardcoded in
the driver.

In my v1 series iteration, I used the 'interrupts' property to provide this
missing information:
   interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* line 0 (reg index 0) route to GIC 103 */
                <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, /* line 1 (reg index 1) route to GIC 104 */
                <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, /* line 2 (reg index 2) route to GIC 105 */
                ...

Base on the interrupts table and the interrupt-map, I deduce the reg index:
  - From interrupt-map, got a GIC interrupt number
  - From interrupts table and the GIC interrupt number, got the line/reg index.

Rob asked to use only interrupt-map and use directly the interrupt-map index as
the hardware index:
  https://lore.kernel.org/lkml/20250801111753.382f52ac@bootlin.com/

> 
> > +		if (index > IRQMUX_MAX_IRQS) {
> > +			of_node_put(imap_item.parent_args.np);
> > +			dev_err(dev, "too much items in interrupt-map\n");
> > +			return -EINVAL;  
> 
> -E2BIG? With such a unique errno, we could even drop the dev_err.

Yes sure.

> 
> > +		}
> > +
> > +		writel(imap_item.child_imap[0], regs + index);
> > +		index++;
> > +	}
> > +
> > +	return 0;
> > +}
> > +
> > +static int irqmux_probe(struct platform_device *pdev)
> > +{
> > +	struct device *dev = &pdev->dev;
> > +	struct device_node *np = dev->of_node;
> > +	u32 __iomem *regs;
> > +	int nr_irqs;
> > +	int ret;
> > +
> > +	regs = devm_platform_ioremap_resource(pdev, 0);
> > +	if (IS_ERR(regs))
> > +		return PTR_ERR(regs);
> > +
> > +	nr_irqs = of_irq_count(np);
> > +	if (nr_irqs < 0)
> > +		return nr_irqs;
> > +
> > +	if (nr_irqs > IRQMUX_MAX_IRQS) {
> > +		dev_err(dev, "too many output interrupts\n");
> > +		return -ENOENT;  
> 
> -E2BIG? Wait, isn't this the same check twice?

This is not the same check but this one should not be there.

Indeed of_irq_count() counts the number of items available in the
'interrupts' property. This is not used anymore.

I missed to remove it from v1 to v2 updates (and also from v2 to v3).

The of_irq_count() call and related checks will be remove in the next
iteration.

Best regards,
Hervé

  reply	other threads:[~2025-09-19 13:15 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-18 10:39 [PATCH v3 0/8] gpio: renesas: Add support for GPIO and related interrupts in RZ/N1 SoC Herve Codina (Schneider Electric)
2025-09-18 10:39 ` [PATCH v3 1/8] of/irq: Introduce for_each_of_imap_item Herve Codina (Schneider Electric)
2025-09-18 10:40 ` [PATCH v3 2/8] of: unittest: Add a test case for for_each_of_imap_item iterator Herve Codina (Schneider Electric)
2025-09-18 10:40 ` [PATCH v3 3/8] irqchip/ls-extirq: Use " Herve Codina (Schneider Electric)
2025-09-18 10:40 ` [PATCH v3 4/8] irqchip/renesas-rza1: " Herve Codina (Schneider Electric)
2025-09-18 10:40 ` [PATCH v3 5/8] ARM: dts: r9a06g032: Add GPIO controllers Herve Codina (Schneider Electric)
2025-09-19 10:03   ` Wolfram Sang
2025-09-22 14:22   ` Bartosz Golaszewski
2025-09-22 15:31     ` Herve Codina
2025-09-22 15:33       ` Bartosz Golaszewski
2025-09-22 16:08         ` Herve Codina
2025-09-18 10:40 ` [PATCH v3 6/8] dt-bindings: soc: renesas: Add the Renesas RZ/N1 GPIO Interrupt Multiplexer Herve Codina (Schneider Electric)
2025-09-18 15:06   ` Conor Dooley
2025-09-18 15:15     ` Herve Codina
2025-09-18 15:26       ` Conor Dooley
2025-09-18 15:39         ` Herve Codina
2025-09-18 15:44           ` Conor Dooley
2025-09-19 17:33             ` Rob Herring
2025-09-19  9:34   ` Wolfram Sang
2025-09-19 12:39     ` Herve Codina
2025-09-18 10:40 ` [PATCH v3 7/8] soc: renesas: Add support for " Herve Codina (Schneider Electric)
2025-09-19  9:41   ` Wolfram Sang
2025-09-19 13:14     ` Herve Codina [this message]
2025-09-19 14:40       ` Wolfram Sang
2025-09-19 15:30         ` Herve Codina
2025-09-19 15:47           ` Wolfram Sang
2025-10-14 13:19   ` Geert Uytterhoeven
2025-10-14 14:11     ` Wolfram Sang
2025-10-14 14:58       ` Geert Uytterhoeven
2025-09-18 10:40 ` [PATCH v3 8/8] ARM: dts: r9a06g032: Add support for GPIO interrupts Herve Codina (Schneider Electric)
2025-09-19  9:42   ` Wolfram Sang
2025-09-19 13:59     ` Herve Codina
2025-09-19 14:41       ` Wolfram Sang
2025-09-19 17:12         ` Herve Codina
2025-09-22 14:16           ` Herve Codina
2025-09-22 14:29             ` Wolfram Sang
2025-09-18 15:37 ` [PATCH v3 0/8] gpio: renesas: Add support for GPIO and related interrupts in RZ/N1 SoC Conor Dooley
2025-09-18 15:57   ` Herve Codina
2025-09-19  5:41 ` Wolfram Sang
2025-09-19  9:43   ` Wolfram Sang
2025-09-19  9:54     ` Wolfram Sang
2025-09-19 15:48       ` Wolfram Sang

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