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From: Cristian Cozzolino via B4 Relay <devnull+cristian_ci.protonmail.com@kernel.org>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	 AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	 Russell King <linux@armlinux.org.uk>,
	Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Sean Wang <sean.wang@mediatek.com>
Cc: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	 linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org,
	 phone-devel@vger.kernel.org,
	 Cristian Cozzolino <cristian_ci@protonmail.com>
Subject: [PATCH 07/10] ARM: dts: mediatek: mt6582: add clock-names property to uart nodes
Date: Sat, 20 Sep 2025 20:23:32 +0200	[thread overview]
Message-ID: <20250920-mt6582-v1-7-b887720f577d@protonmail.com> (raw)
In-Reply-To: <20250920-mt6582-v1-0-b887720f577d@protonmail.com>

From: Cristian Cozzolino <cristian_ci@protonmail.com>

Other SoC DTSI files define this property for their uart nodes.
Do the same here too, to be consistent.

Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com>
---
 arch/arm/boot/dts/mediatek/mt6582.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/mediatek/mt6582.dtsi b/arch/arm/boot/dts/mediatek/mt6582.dtsi
index 54d675ecb390c52c7ca0f406155bfc59e32137ec..82564c740c2182448f8f88bbc2b22c4fef1fdeef 100644
--- a/arch/arm/boot/dts/mediatek/mt6582.dtsi
+++ b/arch/arm/boot/dts/mediatek/mt6582.dtsi
@@ -97,6 +97,7 @@ uart0: serial@11002000 {
 			reg = <0x11002000 0x400>;
 			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
 			clocks = <&uart_clk>;
+			clock-names = "baud";
 			status = "disabled";
 		};
 
@@ -105,6 +106,7 @@ uart1: serial@11003000 {
 			reg = <0x11003000 0x400>;
 			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
 			clocks = <&uart_clk>;
+			clock-names = "baud";
 			status = "disabled";
 		};
 
@@ -113,6 +115,7 @@ uart2: serial@11004000 {
 			reg = <0x11004000 0x400>;
 			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
 			clocks = <&uart_clk>;
+			clock-names = "baud";
 			status = "disabled";
 		};
 
@@ -121,6 +124,7 @@ uart3: serial@11005000 {
 			reg = <0x11005000 0x400>;
 			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
 			clocks = <&uart_clk>;
+			clock-names = "baud";
 			status = "disabled";
 		};
 	};

-- 
2.49.0



  parent reply	other threads:[~2025-09-20 16:24 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-20 18:23 [PATCH 00/10] ARM: Add support for yarisxl mt6582 board Cristian Cozzolino via B4 Relay
2025-09-20 18:23 ` [PATCH 01/10] ARM: mediatek: add board_dt_compat entry for the MT6582 SoC Cristian Cozzolino via B4 Relay
2025-09-20 18:23 ` [PATCH 02/10] ARM: mediatek: add MT6582 smp bring up code Cristian Cozzolino via B4 Relay
2025-09-20 18:23 ` [PATCH 03/10] ARM: dts: mediatek: mt6582: move MMIO devices under soc node Cristian Cozzolino via B4 Relay
2025-09-20 18:23 ` [PATCH 04/10] ARM: dts: mediatek: mt6582: sort nodes and properties Cristian Cozzolino via B4 Relay
2025-09-20 18:23 ` [PATCH 05/10] ARM: dts: mediatek: mt6582: remove compatible property from root node Cristian Cozzolino via B4 Relay
2025-09-20 18:23 ` [PATCH 06/10] ARM: dts: mediatek: mt6582: add mt6582 compatible to timer Cristian Cozzolino via B4 Relay
2025-09-20 18:23 ` Cristian Cozzolino via B4 Relay [this message]
2025-09-20 18:23 ` [PATCH 08/10] ARM: dts: mediatek: mt6582: add enable-method property to cpus Cristian Cozzolino via B4 Relay
2025-09-20 18:23 ` [PATCH 09/10] dt-bindings: arm: mediatek: Add MT6582 yarisxl Cristian Cozzolino via B4 Relay
2025-09-22 20:28   ` Rob Herring (Arm)
2025-09-20 18:23 ` [PATCH 10/10] ARM: dts: mediatek: add basic support for Alcatel yarisxl board Cristian Cozzolino via B4 Relay
2025-09-22 11:05 ` [PATCH 00/10] ARM: Add support for yarisxl mt6582 board AngeloGioacchino Del Regno
2025-10-18 16:41   ` cristian_ci
2025-10-13  9:47 ` (subset) " AngeloGioacchino Del Regno
2025-10-13  9:48 ` AngeloGioacchino Del Regno

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