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[2a02:8440:750d:3377:171e:75f8:f2d4:2af8]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46d1f3e1b03sm40908675e9.23.2025.09.22.03.06.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Sep 2025 03:06:19 -0700 (PDT) From: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= Subject: [PATCH v7 0/7] Add DDR4 memory-controller bindings and factorise LPDDR and DDR bindings Date: Mon, 22 Sep 2025 12:06:13 +0200 Message-Id: <20250922-b4-ddr-bindings-v7-0-b3dd20e54db6@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-B4-Tracking: v=1; b=H4sIAJUf0WgC/x3MQQqAIBBA0avIrBtQS6WuEi0sR5uNhUIE0d2Tl m/x/wOVClOFSTxQ6OLKR25wnYBt9zkRcmgGLbWRo9a4DhhCwZVz4JwqOmUV9SR9NBZadRaKfP/ HeXnfD6+bg1phAAAA X-Change-ID: 20250922-b4-ddr-bindings-7161e3e0af56 To: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Julius Werner , Krzysztof Kozlowski , Maxime Coquelin , Alexandre Torgue Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= , =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= X-Mailer: b4 0.15-dev-0dae4 Introduce DDR4 bindings, which is the first DDR type to be added. As the DDR and LPDDR use the same properties, factorise them in a sdram-props bindings file and rename lpddr-channel into sdram-channel. This v7 is a subset of the v6 and other prior versions, split to simplify the review and merging process. Changes in v7: - None - Link to v6: https://lore.kernel.org/all/20250909-b4-ddrperfm-upstream-v6-5-ce082cc801b5@gmail.com/ Signed-off-by: Clément Le Goffic --- Clément Le Goffic (7): dt-bindings: memory: factorise LPDDR props into SDRAM props dt-bindings: memory: introduce DDR4 dt-bindings: memory: factorise LPDDR channel binding into SDRAM channel dt-binding: memory: add DDR4 channel compatible dt-bindings: memory: SDRAM channel: standardise node name arm64: dts: st: add LPDDR channel to stm32mp257f-dk board arm64: dts: st: add DDR channel to stm32mp257f-ev1 board .../memory-controllers/ddr/jedec,ddr4.yaml | 34 ++++++++ .../memory-controllers/ddr/jedec,lpddr-props.yaml | 74 ----------------- .../memory-controllers/ddr/jedec,lpddr2.yaml | 2 +- .../memory-controllers/ddr/jedec,lpddr3.yaml | 2 +- .../memory-controllers/ddr/jedec,lpddr4.yaml | 2 +- .../memory-controllers/ddr/jedec,lpddr5.yaml | 2 +- ...lpddr-channel.yaml => jedec,sdram-channel.yaml} | 40 ++++++--- .../memory-controllers/ddr/jedec,sdram-props.yaml | 94 ++++++++++++++++++++++ arch/arm64/boot/dts/st/stm32mp257f-dk.dts | 7 ++ arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 7 ++ 10 files changed, 173 insertions(+), 91 deletions(-) --- base-commit: 07e27ad16399afcd693be20211b0dfae63e0615f change-id: 20250922-b4-ddr-bindings-7161e3e0af56 Best regards, -- Clément Le Goffic