devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Rob Herring <robh@kernel.org>
To: Svyatoslav Ryhel <clamor95@gmail.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Thierry Reding <treding@nvidia.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Prashant Gaikwad <pgaikwad@nvidia.com>,
	Mikko Perttunen <mperttunen@nvidia.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Dmitry Osipenko <digetx@gmail.com>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-pm@vger.kernel.org
Subject: Re: [PATCH v3 03/11] dt-bindings: memory: Document Tegra114 Memory Controller
Date: Mon, 22 Sep 2025 11:00:40 -0500	[thread overview]
Message-ID: <20250922160040.GA92842-robh@kernel.org> (raw)
In-Reply-To: <20250915080157.28195-4-clamor95@gmail.com>

On Mon, Sep 15, 2025 at 11:01:49AM +0300, Svyatoslav Ryhel wrote:
> Add Tegra114 support into existing Tegra124 MC schema with the most
> notable difference in the amount of EMEM timings.
> 
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> ---
>  .../nvidia,tegra124-mc.yaml                   | 97 ++++++++++++++-----
>  1 file changed, 74 insertions(+), 23 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml
> index 7b18b4d11e0a..9cc9360d3bd0 100644
> --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml
> +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml
> @@ -19,7 +19,9 @@ description: |
>  
>  properties:
>    compatible:
> -    const: nvidia,tegra124-mc
> +    enum:
> +      - nvidia,tegra114-mc
> +      - nvidia,tegra124-mc
>  
>    reg:
>      maxItems: 1
> @@ -64,29 +66,10 @@ patternProperties:
>  
>            nvidia,emem-configuration:
>              $ref: /schemas/types.yaml#/definitions/uint32-array
> -            description: |
> +            description:
>                Values to be written to the EMEM register block. See section
> -              "15.6.1 MC Registers" in the TRM.
> -            items:
> -              - description: MC_EMEM_ARB_CFG
> -              - description: MC_EMEM_ARB_OUTSTANDING_REQ
> -              - description: MC_EMEM_ARB_TIMING_RCD
> -              - description: MC_EMEM_ARB_TIMING_RP
> -              - description: MC_EMEM_ARB_TIMING_RC
> -              - description: MC_EMEM_ARB_TIMING_RAS
> -              - description: MC_EMEM_ARB_TIMING_FAW
> -              - description: MC_EMEM_ARB_TIMING_RRD
> -              - description: MC_EMEM_ARB_TIMING_RAP2PRE
> -              - description: MC_EMEM_ARB_TIMING_WAP2PRE
> -              - description: MC_EMEM_ARB_TIMING_R2R
> -              - description: MC_EMEM_ARB_TIMING_W2W
> -              - description: MC_EMEM_ARB_TIMING_R2W
> -              - description: MC_EMEM_ARB_TIMING_W2R
> -              - description: MC_EMEM_ARB_DA_TURNS
> -              - description: MC_EMEM_ARB_DA_COVERS
> -              - description: MC_EMEM_ARB_MISC0
> -              - description: MC_EMEM_ARB_MISC1
> -              - description: MC_EMEM_ARB_RING1_THROTTLE
> +              "20.11.1 MC Registers" in the Tegea114 TRM or
> +              "15.6.1 MC Registers" in the Tegra124 TRM.
>  
>          required:
>            - clock-frequency
> @@ -109,6 +92,74 @@ required:
>    - "#iommu-cells"
>    - "#interconnect-cells"
>  
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - nvidia,tegra114-mc
> +    then:
> +      patternProperties:
> +        "^emc-timings-[0-9]+$":
> +          patternProperties:
> +            "^timing-[0-9]+$":
> +              properties:
> +                nvidia,emem-configuration:
> +                  items:
> +                    - description: MC_EMEM_ARB_CFG
> +                    - description: MC_EMEM_ARB_OUTSTANDING_REQ
> +                    - description: MC_EMEM_ARB_TIMING_RCD
> +                    - description: MC_EMEM_ARB_TIMING_RP
> +                    - description: MC_EMEM_ARB_TIMING_RC
> +                    - description: MC_EMEM_ARB_TIMING_RAS
> +                    - description: MC_EMEM_ARB_TIMING_FAW
> +                    - description: MC_EMEM_ARB_TIMING_RRD
> +                    - description: MC_EMEM_ARB_TIMING_RAP2PRE
> +                    - description: MC_EMEM_ARB_TIMING_WAP2PRE
> +                    - description: MC_EMEM_ARB_TIMING_R2R
> +                    - description: MC_EMEM_ARB_TIMING_W2W
> +                    - description: MC_EMEM_ARB_TIMING_R2W
> +                    - description: MC_EMEM_ARB_TIMING_W2R
> +                    - description: MC_EMEM_ARB_DA_TURNS
> +                    - description: MC_EMEM_ARB_DA_COVERS
> +                    - description: MC_EMEM_ARB_MISC0
> +                    - description: MC_EMEM_ARB_RING1_THROTTLE

Like I said before, I don't think it is worth enumerating the list of 
registers for every variant. If you want to define the length 
(minItems/maxItems), then that is fine.

Rob

  reply	other threads:[~2025-09-22 16:00 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-15  8:01 [PATCH v3 00/11] Tegra114: implement EMC support Svyatoslav Ryhel
2025-09-15  8:01 ` [PATCH v3 01/11] devfreq: tegra30-devfreq: add support for Tegra114 Svyatoslav Ryhel
2025-11-11  8:55   ` Mikko Perttunen
2025-11-11 13:34     ` Svyatoslav Ryhel
2025-11-13  4:20       ` Mikko Perttunen
2025-09-15  8:01 ` [PATCH v3 02/11] ARM: tegra: Add ACTMON node to Tegra114 device tree Svyatoslav Ryhel
2025-11-11  9:00   ` Mikko Perttunen
2025-09-15  8:01 ` [PATCH v3 03/11] dt-bindings: memory: Document Tegra114 Memory Controller Svyatoslav Ryhel
2025-09-22 16:00   ` Rob Herring [this message]
2025-09-22 16:18     ` Svyatoslav Ryhel
2025-09-24 15:24       ` Rob Herring
2025-12-01 14:18         ` Thierry Reding
2025-09-15  8:01 ` [PATCH v3 04/11] memory: tegra: implement EMEM regs and ICC ops for Tegra114 Svyatoslav Ryhel
2025-11-13  4:36   ` Mikko Perttunen
2025-09-15  8:01 ` [PATCH v3 05/11] dt-bindings: memory: Add Tegra114 memory client IDs Svyatoslav Ryhel
2025-11-13  4:47   ` Mikko Perttunen
2025-09-15  8:01 ` [PATCH v3 06/11] clk: tegra: remove EMC to MC clock mux in Tegra114 Svyatoslav Ryhel
2025-09-21 17:54   ` Stephen Boyd
2025-11-13 14:21     ` Svyatoslav Ryhel
2025-11-25 10:21     ` Svyatoslav Ryhel
2025-11-13  5:05   ` Mikko Perttunen
2025-11-13 14:29     ` Svyatoslav Ryhel
2025-09-15  8:01 ` [PATCH v3 07/11] dt-bindings: memory: Document Tegra114 External Memory Controller Svyatoslav Ryhel
2025-09-15  8:01 ` [PATCH v3 08/11] memory: tegra: Add Tegra114 EMC driver Svyatoslav Ryhel
2025-11-18  7:08   ` Mikko Perttunen
2025-11-18  8:05     ` Svyatoslav Ryhel
2025-11-21  4:03       ` Mikko Perttunen
2025-11-21  8:54         ` Svyatoslav Ryhel
2025-11-25  3:29           ` Mikko Perttunen
2025-09-15  8:01 ` [PATCH v3 09/11] ARM: tegra: Add External Memory Controller node on Tegra114 Svyatoslav Ryhel
2025-09-15  8:01 ` [PATCH v3 10/11] ARM: tegra: Add EMC OPP and ICC properties to Tegra114 EMC and ACTMON device-tree nodes Svyatoslav Ryhel
2025-09-15  8:01 ` [PATCH v3 11/11] ARM: tegra: add DC interconnections for Tegra114 Svyatoslav Ryhel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20250922160040.GA92842-robh@kernel.org \
    --to=robh@kernel.org \
    --cc=clamor95@gmail.com \
    --cc=conor+dt@kernel.org \
    --cc=cw00.choi@samsung.com \
    --cc=devicetree@vger.kernel.org \
    --cc=digetx@gmail.com \
    --cc=jonathanh@nvidia.com \
    --cc=krzk@kernel.org \
    --cc=kyungmin.park@samsung.com \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=mperttunen@nvidia.com \
    --cc=mturquette@baylibre.com \
    --cc=myungjoo.ham@samsung.com \
    --cc=pgaikwad@nvidia.com \
    --cc=sboyd@kernel.org \
    --cc=thierry.reding@gmail.com \
    --cc=treding@nvidia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).