From: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, aiqun.yu@oss.qualcomm.com,
tingwei.zhang@oss.qualcomm.com, trilok.soni@oss.qualcomm.com,
yijie.yang@oss.qualcomm.com,
Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Subject: [PATCH 12/20] arm64: dts: qcom: kaanapali: Add misc features
Date: Wed, 24 Sep 2025 17:17:29 -0700 [thread overview]
Message-ID: <20250924-knp-dts-v1-12-3fdbc4b9e1b1@oss.qualcomm.com> (raw)
In-Reply-To: <20250924-knp-dts-v1-0-3fdbc4b9e1b1@oss.qualcomm.com>
Add more features for Kaanapali SoC including spmi-bus, tsens,
random number generator (RNG), Qcrypto and coresight.
Written with help from Jishnu Prakash(added spmi-bus), Gaurav Kashyap
(added crypto), Manaf Meethalavalappu Pallikunhi(added tsens) and
Jinlong Mao(added coresight).
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/kaanapali.dtsi | 927 ++++++++++++++++++++++++++++++++
1 file changed, 927 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
index c3b38fd851c5..6ed7acdb871e 100644
--- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi
+++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
@@ -671,6 +671,11 @@ IPCC_MPROC_SIGNAL_GLINK_QMP
};
};
+ rng: rng@10c3000 {
+ compatible = "qcom,kaanapali-trng", "qcom,trng";
+ reg = <0x0 0x010c3000 0x0 0x1000>;
+ };
+
ipcc: mailbox@1106000 {
compatible = "qcom,kaanapali-ipcc", "qcom,ipcc";
reg = <0x0 0x01106000 0x0 0x1000>;
@@ -1034,6 +1039,39 @@ ice: crypto@1d88000 {
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
};
+ cryptobam: dma-controller@1dc4000 {
+ compatible = "qcom,bam-crypto-v6";
+ reg = <0x0 0x01dc4000 0x0 0x22000>;
+
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+
+ #dma-cells = <1>;
+
+ iommus = <&apps_smmu 0xc0 0x0>,
+ <&apps_smmu 0xc1 0x0>;
+
+ qcom,ee = <0>;
+ qcom,num-ees = <4>;
+ num-channels = <16>;
+ qcom,controlled-remotely;
+ };
+
+ crypto: crypto@1dfa000 {
+ compatible = "qcom,kaanapali-qce", "qcom,sm8150-qce", "qcom,qce";
+ reg = <0x0 0x01dfa000 0x0 0x6000>;
+
+ interconnects = <&aggre_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "memory";
+
+ dmas = <&cryptobam 4>, <&cryptobam 5>;
+ dma-names = "rx", "tx";
+
+ iommus = <&apps_smmu 0xc0 0x0>,
+ <&apps_smmu 0xc1 0x0>;
+
+ };
+
tcsr_mutex: hwlock@1f40000 {
compatible = "qcom,tcsr-mutex";
reg = <0x0 0x01f40000 0x0 0x20000>;
@@ -1472,6 +1510,90 @@ pdc: interrupt-controller@b220000 {
interrupt-controller;
};
+ tsens0: thermal-sensor@c229000 {
+ compatible = "qcom,kaanapali-tsens", "qcom,tsens-v2";
+ reg = <0x0 0x0c229000 0x0 0x1000>,
+ <0x0 0x0c222000 0x0 0x1000>;
+ interrupts = <GIC_SPI 771 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 484 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow",
+ "critical";
+ #qcom,sensors = <5>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ tsens1: thermal-sensor@c22a000 {
+ compatible = "qcom,kaanapali-tsens", "qcom,tsens-v2";
+ reg = <0x0 0x0c22a000 0x0 0x1000>,
+ <0x0 0x0c223000 0x0 0x1000>;
+ interrupts = <GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 485 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow",
+ "critical";
+ #qcom,sensors = <12>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ tsens2: thermal-sensor@c22b000 {
+ compatible = "qcom,kaanapali-tsens", "qcom,tsens-v2";
+ reg = <0x0 0x0c22b000 0x0 0x1000>,
+ <0x0 0x0c224000 0x0 0x1000>;
+ interrupts = <GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow",
+ "critical";
+ #qcom,sensors = <7>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ tsens3: thermal-sensor@c22c000 {
+ compatible = "qcom,kaanapali-tsens", "qcom,tsens-v2";
+ reg = <0x0 0x0c22c000 0x0 0x1000>,
+ <0x0 0x0c225000 0x0 0x1000>;
+ interrupts = <GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow",
+ "critical";
+ #qcom,sensors = <4>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ tsens4: thermal-sensor@c22d000 {
+ compatible = "qcom,kaanapali-tsens", "qcom,tsens-v2";
+ reg = <0x0 0x0c22d000 0x0 0x1000>,
+ <0x0 0x0c226000 0x0 0x1000>;
+ interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow",
+ "critical";
+ #qcom,sensors = <8>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ tsens5: thermal-sensor@c22e000 {
+ compatible = "qcom,kaanapali-tsens", "qcom,tsens-v2";
+ reg = <0x0 0x0c22e000 0x0 0x1000>,
+ <0x0 0x0c227000 0x0 0x1000>;
+ interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow",
+ "critical";
+ #qcom,sensors = <12>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ tsens6: thermal-sensor@c22f000 {
+ compatible = "qcom,kaanapali-tsens", "qcom,tsens-v2";
+ reg = <0x0 0x0c22f000 0x0 0x1000>,
+ <0x0 0x0c228000 0x0 0x1000>;
+ interrupts = <GIC_SPI 545 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow",
+ "critical";
+ #qcom,sensors = <7>;
+ #thermal-sensor-cells = <1>;
+ };
+
aoss_qmp: power-management@c300000 {
compatible = "qcom,kaanapali-aoss-qmp", "qcom,aoss-qmp";
reg = <0x0 0x0c300000 0x0 0x400>;
@@ -1486,6 +1608,53 @@ IPCC_MPROC_SIGNAL_GLINK_QMP
#clock-cells = <0>;
};
+ pmic_arbiter: arbiter@c400000 {
+ compatible = "qcom,kaanapali-spmi-pmic-arb", "qcom,glymur-spmi-pmic-arb";
+ reg = <0x0 0x0c400000 0x0 0x3000>,
+ <0x0 0x0c900000 0x0 0x400000>,
+ <0x0 0x0c4c0000 0x0 0x400000>,
+ <0x0 0x0c403000 0x0 0x8000>;
+ reg-names = "core",
+ "chnls",
+ "obsrvr",
+ "chnl_map";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ qcom,channel = <0>;
+ qcom,ee = <0>;
+
+ spmi_bus0: spmi@c426000 {
+ reg = <0x0 0x0c426000 0x0 0x4000>,
+ <0x0 0x0c8c0000 0x0 0x10000>,
+ <0x0 0x0c42a000 0x0 0x8000>;
+ reg-names = "cnfg",
+ "intr",
+ "chnl_owner";
+ interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "periph_irq";
+ interrupt-controller;
+ #interrupt-cells = <4>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ };
+
+ spmi_bus1: spmi@c437000 {
+ reg = <0x0 0x0c437000 0x0 0x4000>,
+ <0x0 0x0c8d0000 0x0 0x10000>,
+ <0x0 0x0c43b000 0x0 0x8000>;
+ reg-names = "cnfg",
+ "intr",
+ "chnl_owner";
+ interrupts-extended = <&pdc 3 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "periph_irq";
+ interrupt-controller;
+ #interrupt-cells = <4>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ };
+ };
+
tlmm: pinctrl@f100000 {
compatible = "qcom,kaanapali-tlmm";
reg = <0x0 0x0f100000 0x0 0x300000>;
@@ -1560,6 +1729,103 @@ card-detect-pins {
};
};
+ stm@10002000 {
+ compatible = "arm,coresight-stm", "arm,primecell";
+ reg = <0x0 0x10002000 0x0 0x1000>,
+ <0x0 0x16280000 0x0 0x180000>;
+ reg-names = "stm-base", "stm-stimulus-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ stm_out_funnel_in0: endpoint {
+ remote-endpoint =
+ <&funnel_in0_in_stm>;
+ };
+ };
+ };
+ };
+
+ funnel@10041000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x0 0x10041000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@7 {
+ reg = <7>;
+ funnel_in0_in_stm: endpoint {
+ remote-endpoint =
+ <&stm_out_funnel_in0>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ funnel_in0_out_funnel_aoss: endpoint {
+ remote-endpoint =
+ <&funnel_aoss_in_funnel_in0>;
+ };
+ };
+ };
+ };
+
+ funnel@11304000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+
+ reg = <0x0 0x11304000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@6 {
+ reg = <6>;
+ funnel_aoss_in_funnel_in0: endpoint {
+ remote-endpoint =
+ <&funnel_in0_out_funnel_aoss>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ funnel_aoss_out_tmc_etf: endpoint {
+ remote-endpoint =
+ <&tmc_etf_in_funnel_aoss>;
+ };
+ };
+ };
+ };
+
+ tmc@11305000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x0 0x11305000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ tmc_etf_in_funnel_aoss: endpoint {
+ remote-endpoint =
+ <&funnel_aoss_out_tmc_etf>;
+ };
+ };
+ };
+ };
+
sram@14680000 {
compatible = "qcom,kaanapali-imem", "syscon", "simple-mfd";
reg = <0x0 0x14680000 0x0 0x1000>;
@@ -2232,6 +2498,667 @@ pdp_tx: scp-sram-section@100 {
};
};
+ thermal-zones {
+ cpullc-0-0-thermal {
+ thermal-sensors = <&tsens0 0>;
+
+ trips {
+ cpullc-0-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpullc-0-1-thermal {
+ thermal-sensors = <&tsens0 1>;
+
+ trips {
+ cpullc-0-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ qmx-0-0-thermal {
+ thermal-sensors = <&tsens0 2>;
+
+ trips {
+ qmx-0-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ qmx-0-1-thermal {
+ thermal-sensors = <&tsens0 3>;
+
+ trips {
+ qmx-0-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ qmx-0-2-thermal {
+ thermal-sensors = <&tsens0 4>;
+
+ trips {
+ qmx-0-2-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-0-0-0-thermal {
+ thermal-sensors = <&tsens1 0>;
+
+ trips {
+ cpu-0-0-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-0-0-1-thermal {
+ thermal-sensors = <&tsens1 1>;
+
+ trips {
+ cpu-0-0-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-0-1-0-thermal {
+ thermal-sensors = <&tsens1 2>;
+
+ trips {
+ cpu-0-1-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-0-1-1-thermal {
+ thermal-sensors = <&tsens1 3>;
+
+ trips {
+ cpu-0-1-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-0-2-0-thermal {
+ thermal-sensors = <&tsens1 4>;
+
+ trips {
+ cpu-0-2-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-0-2-1-thermal {
+ thermal-sensors = <&tsens1 5>;
+
+ trips {
+ cpu-0-2-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-0-3-0-thermal {
+ thermal-sensors = <&tsens1 6>;
+
+ trips {
+ cpu-0-3-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-0-3-1-thermal {
+ thermal-sensors = <&tsens1 7>;
+
+ trips {
+ cpu-0-3-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-0-4-0-thermal {
+ thermal-sensors = <&tsens1 8>;
+
+ trips {
+ cpu-0-4-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-0-4-1-thermal {
+ thermal-sensors = <&tsens1 9>;
+
+ trips {
+ cpu-0-4-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-0-5-0-thermal {
+ thermal-sensors = <&tsens1 10>;
+
+ trips {
+ cpu-0-5-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-0-5-1-thermal {
+ thermal-sensors = <&tsens1 11>;
+
+ trips {
+ cpu-0-5-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpullc-1-0-thermal {
+ thermal-sensors = <&tsens2 0>;
+
+ trips {
+ cpullc-1-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpullc-1-1-thermal {
+ thermal-sensors = <&tsens2 1>;
+
+ trips {
+ cpullc-1-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ qmx-1-0-thermal {
+ thermal-sensors = <&tsens2 2>;
+
+ trips {
+ qmx-1-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ qmx-1-1-thermal {
+ thermal-sensors = <&tsens2 3>;
+
+ trips {
+ qmx-1-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ qmx-1-2-thermal {
+ thermal-sensors = <&tsens2 4>;
+
+ trips {
+ qmx-1-2-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ qmx-1-3-thermal {
+ thermal-sensors = <&tsens2 5>;
+
+ trips {
+ qmx-1-3-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ qmx-1-4-thermal {
+ thermal-sensors = <&tsens2 6>;
+
+ trips {
+ qmx-1-4-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-1-0-0-thermal {
+ thermal-sensors = <&tsens3 0>;
+
+ trips {
+ cpu-1-0-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-1-0-1-thermal {
+ thermal-sensors = <&tsens3 1>;
+
+ trips {
+ cpu-1-0-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-1-1-0-thermal {
+ thermal-sensors = <&tsens3 2>;
+
+ trips {
+ cpu-1-1-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-1-1-1-thermal {
+ thermal-sensors = <&tsens3 3>;
+
+ trips {
+ cpu-1-1-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ nsphvx-0-thermal {
+ thermal-sensors = <&tsens4 0>;
+
+ trips {
+ nsphvx-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ nsphvx-1-thermal {
+ thermal-sensors = <&tsens4 1>;
+
+ trips {
+ nsphvx-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ nsphvx-2-thermal {
+ thermal-sensors = <&tsens4 2>;
+
+ trips {
+ nsphvx-2-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ nsphvx-3-thermal {
+ thermal-sensors = <&tsens4 3>;
+
+ trips {
+ nsphvx-3-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ nsphmx-0-thermal {
+ thermal-sensors = <&tsens4 4>;
+
+ trips {
+ nsphmx-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ nsphmx-1-thermal {
+ thermal-sensors = <&tsens4 5>;
+
+ trips {
+ nsphmx-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ nsphmx-2-thermal {
+ thermal-sensors = <&tsens4 6>;
+
+ trips {
+ nsphmx-2-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ nsphmx-3-thermal {
+ thermal-sensors = <&tsens4 7>;
+
+ trips {
+ nsphmx-3-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-0-thermal {
+ thermal-sensors = <&tsens5 0>;
+
+ trips {
+ gpuss-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-1-thermal {
+ thermal-sensors = <&tsens5 1>;
+
+ trips {
+ gpuss-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-2-thermal {
+ thermal-sensors = <&tsens5 2>;
+
+ trips {
+ gpuss-2-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-3-thermal {
+ thermal-sensors = <&tsens5 3>;
+
+ trips {
+ gpuss-3-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-4-thermal {
+ thermal-sensors = <&tsens5 4>;
+
+ trips {
+ gpuss-4-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-5-thermal {
+ thermal-sensors = <&tsens5 5>;
+
+ trips {
+ gpuss-5-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-6-thermal {
+ thermal-sensors = <&tsens5 6>;
+
+ trips {
+ gpuss-6-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-7-thermal {
+ thermal-sensors = <&tsens5 7>;
+
+ trips {
+ gpuss-7-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-8-thermal {
+ thermal-sensors = <&tsens5 8>;
+
+ trips {
+ gpuss-8-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-9-thermal {
+ thermal-sensors = <&tsens5 9>;
+
+ trips {
+ gpuss-9-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-10-thermal {
+ thermal-sensors = <&tsens5 10>;
+
+ trips {
+ gpuss-10-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ ddr-thermal {
+ thermal-sensors = <&tsens5 11>;
+
+ trips {
+ ddr-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ mdmss-0-thermal {
+ thermal-sensors = <&tsens6 0>;
+
+ trips {
+ mdmss-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ mdmss-1-thermal {
+ thermal-sensors = <&tsens6 1>;
+ trips {
+ mdmss-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ mdmss-2-thermal {
+ thermal-sensors = <&tsens6 2>;
+
+ trips {
+ mdmss-2-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ mdmss-3-thermal {
+ thermal-sensors = <&tsens6 3>;
+
+ trips {
+ mdmss-3-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ camera-0-thermal {
+ thermal-sensors = <&tsens6 4>;
+
+ trips {
+ camera-0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ camera-1-thermal {
+ thermal-sensors = <&tsens6 5>;
+
+ trips {
+ camera-1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ video-thermal {
+ thermal-sensors = <&tsens6 6>;
+
+ trips {
+ video-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+ };
+
timer {
compatible = "arm,armv8-timer";
--
2.25.1
next prev parent reply other threads:[~2025-09-25 0:17 UTC|newest]
Thread overview: 135+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-25 0:17 [PATCH 00/20] arm64: dts: qcom: Introduce Kaanapali platform device tree Jingyi Wang
2025-09-25 0:17 ` [PATCH 01/20] dt-bindings: arm: qcom: Document Kaanapali SoC and its reference boards Jingyi Wang
2025-10-06 9:54 ` Krzysztof Kozlowski
2025-10-06 10:24 ` Krzysztof Kozlowski
2025-10-14 5:13 ` Jingyi Wang
2025-09-25 0:17 ` [PATCH 02/20] arm64: dts: qcom: Introduce Kaanapali SoC Jingyi Wang
2025-09-25 3:22 ` Dmitry Baryshkov
2025-10-14 16:43 ` Taniya Das
2025-10-14 11:46 ` Akhil P Oommen
2025-11-04 9:04 ` Jingyi Wang
2025-11-04 12:54 ` Konrad Dybcio
2025-11-05 7:30 ` Jingyi Wang
2025-11-05 10:13 ` Konrad Dybcio
2025-11-20 6:53 ` Komal Bajaj
2025-11-20 7:22 ` Jingyi Wang
2025-09-25 0:17 ` [PATCH 03/20] arm64: dts: qcom: kaanapali: Add base MTP board Jingyi Wang
2025-09-25 3:18 ` Dmitry Baryshkov
2025-09-25 7:17 ` Aiqun(Maria) Yu
2025-09-25 9:44 ` Konrad Dybcio
2025-09-25 0:17 ` [PATCH 04/20] arm64: dts: qcom: kaanapali: Add support for PCIe0 on Kaanapali Jingyi Wang
2025-09-25 10:56 ` Konrad Dybcio
2025-10-06 14:23 ` Krzysztof Kozlowski
2025-10-07 1:24 ` Dmitry Baryshkov
2025-10-07 1:46 ` Krzysztof Kozlowski
2025-10-08 19:04 ` Dmitry Baryshkov
2025-09-25 0:17 ` [PATCH 05/20] arm64: dts: qcom: kaanapali: Add SDC2 nodes for Kaanapali soc Jingyi Wang
2025-09-25 0:17 ` [PATCH 06/20] arm64: dts: qcom: kaanapali: Add USB support for Kaanapali SoC Jingyi Wang
2025-09-25 1:50 ` Krzysztof Kozłowski
2025-09-25 7:39 ` Aiqun(Maria) Yu
2025-09-25 8:24 ` Krzysztof Kozłowski
2025-09-25 8:32 ` Krzysztof Kozlowski
2025-09-25 9:01 ` Krzysztof Kozlowski
2025-09-25 16:49 ` Dmitry Baryshkov
2025-09-25 18:26 ` Trilok Soni
2025-09-26 13:04 ` Konrad Dybcio
2025-09-25 13:57 ` Bjorn Andersson
2025-09-25 14:12 ` Krzysztof Kozlowski
2025-09-25 21:31 ` Rob Herring
2025-09-26 13:21 ` Konrad Dybcio
2025-09-26 14:47 ` Rob Herring
2025-09-29 6:06 ` Aiqun(Maria) Yu
2025-09-29 7:19 ` Dmitry Baryshkov
2025-09-25 3:20 ` Dmitry Baryshkov
2025-09-25 7:49 ` Aiqun(Maria) Yu
2025-09-25 9:46 ` Konrad Dybcio
2025-09-25 0:17 ` [PATCH 07/20] arm64: dts: qcom: kaanapali: Add remoteprocs " Jingyi Wang
2025-09-30 17:24 ` Alexey Klimov
2025-11-04 8:59 ` Jingyi Wang
2025-11-04 10:01 ` Kumari Pallavi
2025-11-04 13:25 ` Alexey Klimov
2025-09-25 0:17 ` [PATCH 08/20] arm64: dts: qcom: Add PMK8850 pmic dtsi Jingyi Wang
2025-09-25 12:20 ` Konrad Dybcio
2025-09-25 0:17 ` [PATCH 09/20] arm64: dts: qcom: Add PMH0101 " Jingyi Wang
2025-09-25 12:20 ` Konrad Dybcio
2025-10-09 13:47 ` Jishnu Prakash
2025-09-25 0:17 ` [PATCH 10/20] arm64: dts: qcom: Add PMH0104 " Jingyi Wang
2025-09-25 7:59 ` Krzysztof Kozlowski
2025-09-25 12:21 ` Konrad Dybcio
2025-09-29 6:51 ` Aiqun(Maria) Yu
2025-09-25 0:17 ` [PATCH 11/20] arm64: dts: qcom: Add PMH0110 " Jingyi Wang
2025-09-25 0:17 ` Jingyi Wang [this message]
2025-09-25 0:17 ` [PATCH 13/20] arm64: dts: qcom: kaanapali: Add QUPv3 configuration for serial engines Jingyi Wang
2025-09-25 12:28 ` Konrad Dybcio
2025-09-25 13:19 ` Krzysztof Kozlowski
2025-09-29 3:05 ` Jingyi Wang
2025-09-29 5:42 ` Jingyi Wang
2025-09-29 6:41 ` Aiqun(Maria) Yu
2025-09-29 13:11 ` Konstantin Ryabitsev
2025-09-30 2:14 ` Aiqun(Maria) Yu
2025-09-25 0:17 ` [PATCH 14/20] arm64: dts: qcom: kaanapali-mtp: Enable more features Jingyi Wang
2025-09-25 2:09 ` Dmitry Baryshkov
2025-09-25 9:48 ` Konrad Dybcio
2025-09-26 9:11 ` Ronak Raheja
2025-09-26 11:44 ` Konrad Dybcio
2025-09-26 13:46 ` Dmitry Baryshkov
2025-09-29 3:24 ` Jingyi Wang
2025-09-25 8:03 ` Eugen Hristev
2025-10-09 13:54 ` Jishnu Prakash
2025-10-09 14:58 ` Eugen Hristev
2025-10-09 16:28 ` Dmitry Baryshkov
2025-10-10 10:54 ` Jishnu Prakash
2025-10-10 14:02 ` Eugen Hristev
2025-10-13 16:21 ` Kamal Wadhwa
2025-09-25 0:17 ` [PATCH 15/20] arm64: dts: qcom: kaanapali-mtp: Enable modem Jingyi Wang
2025-09-25 2:10 ` Dmitry Baryshkov
2025-09-29 3:28 ` Jingyi Wang
2025-09-25 14:06 ` Bjorn Andersson
2025-09-29 3:29 ` Jingyi Wang
2025-09-25 0:17 ` [PATCH 16/20] arm64: dts: qcom: kaanapali: Add QRD board Jingyi Wang
2025-09-25 2:15 ` Dmitry Baryshkov
2025-09-29 3:29 ` Jingyi Wang
2025-09-25 0:17 ` [PATCH 17/20] arm64: dts: qcom: kaanapali: Add support for audio Jingyi Wang
2025-09-25 12:30 ` Konrad Dybcio
2025-09-25 0:17 ` [PATCH 18/20] arm64: dts: qcom: kaanapali-mtp: Add audio support (WSA8845, WCD9395, DMIC) Jingyi Wang
2025-09-25 12:30 ` Konrad Dybcio
2025-09-25 13:26 ` Krzysztof Kozlowski
2025-09-30 12:06 ` Prasad Kumpatla
2025-10-06 8:48 ` Krzysztof Kozlowski
2025-10-08 10:20 ` Konrad Dybcio
2025-10-08 10:51 ` Krzysztof Kozlowski
2025-10-08 11:30 ` Konrad Dybcio
2025-10-08 23:50 ` Krzysztof Kozlowski
2025-10-27 9:39 ` Konrad Dybcio
2025-09-25 0:17 ` [PATCH 19/20] arm64: dts: qcom: kaanapali: Add support for camss Jingyi Wang
2025-09-25 0:17 ` [PATCH 20/20] arm64: dts: qcom: kaanapali: Add iris video node Jingyi Wang
2025-10-07 2:17 ` Krzysztof Kozlowski
2025-10-08 8:30 ` Konrad Dybcio
2025-09-25 14:12 ` [PATCH 00/20] arm64: dts: qcom: Introduce Kaanapali platform device tree Rob Herring (Arm)
2025-09-25 16:51 ` Dmitry Baryshkov
2025-09-30 17:48 ` Alexey Klimov
2025-10-03 9:09 ` Prasad Kumpatla
2025-10-03 16:35 ` Alexey Klimov
2025-10-14 6:09 ` Jingyi Wang
2025-12-02 18:21 ` Pavel Machek
2025-12-02 18:33 ` Konrad Dybcio
2025-12-02 20:56 ` Pavel Machek
2025-12-03 10:34 ` Konrad Dybcio
2025-12-03 16:17 ` Pavel Machek
2025-12-03 17:31 ` Krzysztof Kozlowski
2025-12-03 18:10 ` Pavel Machek
2025-12-03 18:40 ` Krzysztof Kozlowski
2025-12-03 18:41 ` Krzysztof Kozlowski
2025-12-04 9:09 ` Pavel Machek
2025-12-04 10:41 ` Krzysztof Kozlowski
2025-12-04 11:42 ` Pavel Machek
2025-12-04 12:10 ` Krzysztof Kozlowski
2025-12-04 12:26 ` Pavel Machek
2025-12-04 9:14 ` Pavel Machek
2025-12-04 10:42 ` Krzysztof Kozlowski
2025-12-04 11:44 ` Pavel Machek
2025-12-04 12:07 ` Krzysztof Kozlowski
2025-12-04 2:41 ` Jingyi Wang
2025-12-04 8:56 ` Pavel Machek
2025-12-04 9:01 ` Krzysztof Kozlowski
2025-12-04 9:06 ` Pavel Machek
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