* [PATCH] arm64: dts: broadcom: bcm2712: adjust display status
@ 2025-09-24 8:57 Peter Robinson
2025-09-24 10:52 ` Stefan Wahren
2025-10-07 21:11 ` Florian Fainelli
0 siblings, 2 replies; 3+ messages in thread
From: Peter Robinson @ 2025-09-24 8:57 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Florian Fainelli,
Broadcom internal kernel review list, Dave Stevenson,
Stefan Wahren, Phil Elwell, Andrea della Porta, devicetree,
linux-rpi-kernel, linux-arm-kernel
Cc: Peter Robinson
Typically non critical IP in a SoC are disabled by
default in the SoC .dtsi and enabled on board specific
configs. There are usecases, such as some CM5 carrier
boards, where display output may not be desired or
connected. So disable them on the SoC .dtsi and enable
them on the RPi5 board.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Dave Stevenson <dave.stevenson@raspberrypi.com>
Cc: Andrea della Porta <andrea.porta@suse.com>
Fixes: 25d77bdd7df2 ("arm64: dts: broadcom: Add display pipeline support to BCM2712")
---
.../dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts | 31 +++++++++++++++++++
arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 11 +++++++
2 files changed, 42 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts
index 6ea3c102e0d67..359c262b8d956 100644
--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts
@@ -97,19 +97,42 @@ power: power {
};
};
+&ddc0 {
+ status = "okay";
+};
+
+&ddc1 {
+ status = "okay";
+};
+
+&disp_intr {
+ status = "okay";
+};
+
&hvs {
clocks = <&firmware_clocks 4>, <&firmware_clocks 16>;
clock-names = "core", "disp";
+ status = "okay";
};
&hdmi0 {
clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
clock-names = "hdmi", "bvb", "audio", "cec";
+ status = "okay";
};
&hdmi1 {
clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
clock-names = "hdmi", "bvb", "audio", "cec";
+ status = "okay";
+};
+
+&mop {
+ status = "okay";
+};
+
+&moplet {
+ status = "okay";
};
&pcie1 {
@@ -119,3 +142,11 @@ &pcie1 {
&pcie2 {
status = "okay";
};
+
+&pixelvalve0 {
+ status = "okay";
+};
+
+&pixelvalve1 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
index 4cae17c04b50a..4cd51d80d40d0 100644
--- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
@@ -287,12 +287,14 @@ pixelvalve0: pixelvalve@7c410000 {
compatible = "brcm,bcm2712-pixelvalve0";
reg = <0x7c410000 0x100>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
};
pixelvalve1: pixelvalve@7c411000 {
compatible = "brcm,bcm2712-pixelvalve1";
reg = <0x7c411000 0x100>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
};
mop: mop@7c500000 {
@@ -300,6 +302,7 @@ mop: mop@7c500000 {
reg = <0x7c500000 0x28>;
interrupt-parent = <&disp_intr>;
interrupts = <1>;
+ status = "disabled";
};
moplet: moplet@7c501000 {
@@ -307,6 +310,7 @@ moplet: moplet@7c501000 {
reg = <0x7c501000 0x20>;
interrupt-parent = <&disp_intr>;
interrupts = <0>;
+ status = "disabled";
};
disp_intr: interrupt-controller@7c502000 {
@@ -315,6 +319,7 @@ disp_intr: interrupt-controller@7c502000 {
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
+ status = "disabled";
};
dvp: clock@7c700000 {
@@ -333,6 +338,7 @@ ddc0: i2c@7d508200 {
clock-frequency = <97500>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
ddc1: i2c@7d508280 {
@@ -343,6 +349,7 @@ ddc1: i2c@7d508280 {
clock-frequency = <97500>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
bsc_irq: interrupt-controller@7d508380 {
@@ -388,6 +395,7 @@ hdmi0: hdmi@7c701400 {
interrupt-names = "cec-tx", "cec-rx", "cec-low",
"hpd-connected", "hpd-removed";
ddc = <&ddc0>;
+ status = "disabled";
};
hdmi1: hdmi@7c706400 {
@@ -417,6 +425,7 @@ hdmi1: hdmi@7c706400 {
interrupt-names = "cec-tx", "cec-rx", "cec-low",
"hpd-connected", "hpd-removed";
ddc = <&ddc1>;
+ status = "disabled";
};
};
@@ -439,6 +448,7 @@ axi: axi {
vc4: gpu {
compatible = "brcm,bcm2712-vc6";
+ status = "disabled";
};
pcie0: pcie@1000100000 {
@@ -611,5 +621,6 @@ hvs: hvs@107c580000 {
interrupt-parent = <&disp_intr>;
interrupts = <2>, <9>, <16>;
interrupt-names = "ch0-eof", "ch1-eof", "ch2-eof";
+ status = "disabled";
};
};
--
2.51.0
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] arm64: dts: broadcom: bcm2712: adjust display status
2025-09-24 8:57 [PATCH] arm64: dts: broadcom: bcm2712: adjust display status Peter Robinson
@ 2025-09-24 10:52 ` Stefan Wahren
2025-10-07 21:11 ` Florian Fainelli
1 sibling, 0 replies; 3+ messages in thread
From: Stefan Wahren @ 2025-09-24 10:52 UTC (permalink / raw)
To: Peter Robinson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Florian Fainelli, Broadcom internal kernel review list,
Dave Stevenson, Phil Elwell, Andrea della Porta, devicetree,
linux-rpi-kernel, linux-arm-kernel
Hi Peter,
Am 24.09.25 um 10:57 schrieb Peter Robinson:
> Typically non critical IP in a SoC are disabled by
> default in the SoC .dtsi and enabled on board specific
> configs. There are usecases, such as some CM5 carrier
> boards, where display output may not be desired or
> connected. So disable them on the SoC .dtsi and enable
> them on the RPi5 board.
>
> Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
> Cc: Dave Stevenson <dave.stevenson@raspberrypi.com>
> Cc: Andrea della Porta <andrea.porta@suse.com>
> Fixes: 25d77bdd7df2 ("arm64: dts: broadcom: Add display pipeline support to BCM2712")
I'm fine with this change in general, but I don't think this is a fix.
Especially there is no CM5 support upstream yet.
Except of this:
Reviewed-by: Stefan Wahren <wahrenst@gmx.net>
> ---
> .../dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts | 31 +++++++++++++++++++
> arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 11 +++++++
> 2 files changed, 42 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts
> index 6ea3c102e0d67..359c262b8d956 100644
> --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts
> +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts
> @@ -97,19 +97,42 @@ power: power {
> };
> };
>
> +&ddc0 {
> + status = "okay";
> +};
> +
> +&ddc1 {
> + status = "okay";
> +};
> +
> +&disp_intr {
> + status = "okay";
> +};
> +
> &hvs {
> clocks = <&firmware_clocks 4>, <&firmware_clocks 16>;
> clock-names = "core", "disp";
> + status = "okay";
> };
>
> &hdmi0 {
> clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
> clock-names = "hdmi", "bvb", "audio", "cec";
> + status = "okay";
> };
>
> &hdmi1 {
> clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
> clock-names = "hdmi", "bvb", "audio", "cec";
> + status = "okay";
> +};
> +
> +&mop {
> + status = "okay";
> +};
> +
> +&moplet {
> + status = "okay";
> };
>
> &pcie1 {
> @@ -119,3 +142,11 @@ &pcie1 {
> &pcie2 {
> status = "okay";
> };
> +
> +&pixelvalve0 {
> + status = "okay";
> +};
> +
> +&pixelvalve1 {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
> index 4cae17c04b50a..4cd51d80d40d0 100644
> --- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
> +++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
> @@ -287,12 +287,14 @@ pixelvalve0: pixelvalve@7c410000 {
> compatible = "brcm,bcm2712-pixelvalve0";
> reg = <0x7c410000 0x100>;
> interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> };
>
> pixelvalve1: pixelvalve@7c411000 {
> compatible = "brcm,bcm2712-pixelvalve1";
> reg = <0x7c411000 0x100>;
> interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> };
>
> mop: mop@7c500000 {
> @@ -300,6 +302,7 @@ mop: mop@7c500000 {
> reg = <0x7c500000 0x28>;
> interrupt-parent = <&disp_intr>;
> interrupts = <1>;
> + status = "disabled";
> };
>
> moplet: moplet@7c501000 {
> @@ -307,6 +310,7 @@ moplet: moplet@7c501000 {
> reg = <0x7c501000 0x20>;
> interrupt-parent = <&disp_intr>;
> interrupts = <0>;
> + status = "disabled";
> };
>
> disp_intr: interrupt-controller@7c502000 {
> @@ -315,6 +319,7 @@ disp_intr: interrupt-controller@7c502000 {
> interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-controller;
> #interrupt-cells = <1>;
> + status = "disabled";
> };
>
> dvp: clock@7c700000 {
> @@ -333,6 +338,7 @@ ddc0: i2c@7d508200 {
> clock-frequency = <97500>;
> #address-cells = <1>;
> #size-cells = <0>;
> + status = "disabled";
> };
>
> ddc1: i2c@7d508280 {
> @@ -343,6 +349,7 @@ ddc1: i2c@7d508280 {
> clock-frequency = <97500>;
> #address-cells = <1>;
> #size-cells = <0>;
> + status = "disabled";
> };
>
> bsc_irq: interrupt-controller@7d508380 {
> @@ -388,6 +395,7 @@ hdmi0: hdmi@7c701400 {
> interrupt-names = "cec-tx", "cec-rx", "cec-low",
> "hpd-connected", "hpd-removed";
> ddc = <&ddc0>;
> + status = "disabled";
> };
>
> hdmi1: hdmi@7c706400 {
> @@ -417,6 +425,7 @@ hdmi1: hdmi@7c706400 {
> interrupt-names = "cec-tx", "cec-rx", "cec-low",
> "hpd-connected", "hpd-removed";
> ddc = <&ddc1>;
> + status = "disabled";
> };
> };
>
> @@ -439,6 +448,7 @@ axi: axi {
>
> vc4: gpu {
> compatible = "brcm,bcm2712-vc6";
> + status = "disabled";
> };
>
> pcie0: pcie@1000100000 {
> @@ -611,5 +621,6 @@ hvs: hvs@107c580000 {
> interrupt-parent = <&disp_intr>;
> interrupts = <2>, <9>, <16>;
> interrupt-names = "ch0-eof", "ch1-eof", "ch2-eof";
> + status = "disabled";
> };
> };
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] arm64: dts: broadcom: bcm2712: adjust display status
2025-09-24 8:57 [PATCH] arm64: dts: broadcom: bcm2712: adjust display status Peter Robinson
2025-09-24 10:52 ` Stefan Wahren
@ 2025-10-07 21:11 ` Florian Fainelli
1 sibling, 0 replies; 3+ messages in thread
From: Florian Fainelli @ 2025-10-07 21:11 UTC (permalink / raw)
To: Peter Robinson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Broadcom internal kernel review list, Dave Stevenson,
Stefan Wahren, Phil Elwell, Andrea della Porta, devicetree,
linux-rpi-kernel, linux-arm-kernel
On 9/24/2025 1:57 AM, Peter Robinson wrote:
> Typically non critical IP in a SoC are disabled by
> default in the SoC .dtsi and enabled on board specific
> configs. There are usecases, such as some CM5 carrier
> boards, where display output may not be desired or
> connected. So disable them on the SoC .dtsi and enable
> them on the RPi5 board.
>
> Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
> Cc: Dave Stevenson <dave.stevenson@raspberrypi.com>
> Cc: Andrea della Porta <andrea.porta@suse.com>
> Fixes: 25d77bdd7df2 ("arm64: dts: broadcom: Add display pipeline support to BCM2712")
Applied to
https://github.com/Broadcom/stblinux/commits/devicetree-arm64/next, thanks!
--
Florian
^ permalink raw reply [flat|nested] 3+ messages in thread
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2025-09-24 10:52 ` Stefan Wahren
2025-10-07 21:11 ` Florian Fainelli
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