From: Bjorn Helgaas <helgaas@kernel.org>
To: Pankaj Patil <pankaj.patil@oss.qualcomm.com>
Cc: bhelgaas@google.com, lpieralisi@kernel.org,
kwilczynski@kernel.org, mani@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, andersson@kernel.org,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] dt-bindings: PCI: qcom,pcie-x1e80100: Set clocks minItems for the fifth Glymur PCIe Controller
Date: Fri, 26 Sep 2025 16:15:22 -0500 [thread overview]
Message-ID: <20250926211522.GA2268583@bhelgaas> (raw)
In-Reply-To: <20250919142325.1090059-1-pankaj.patil@oss.qualcomm.com>
On Fri, Sep 19, 2025 at 07:53:25PM +0530, Pankaj Patil wrote:
> From: Qiang Yu <qiang.yu@oss.qualcomm.com>
>
> On the Qualcomm Glymur platform, the fifth PCIe host is compatible with
> the DWC controller present on the X1E80100 platform, but does not have
> cnoc_sf_axi clock. Hence, set minItems of clocks and clock-names to six.
>
> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
> Signed-off-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com>
Applied with Rob's ack to pci/dt-binding for v6.18, thanks!
> ---
> Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
> index 257068a18264..61581ffbfb24 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
> @@ -32,10 +32,11 @@ properties:
> - const: mhi # MHI registers
>
> clocks:
> - minItems: 7
> + minItems: 6
> maxItems: 7
>
> clock-names:
> + minItems: 6
> items:
> - const: aux # Auxiliary clock
> - const: cfg # Configuration clock
> --
> 2.34.1
>
prev parent reply other threads:[~2025-09-26 21:15 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-19 14:23 [PATCH] dt-bindings: PCI: qcom,pcie-x1e80100: Set clocks minItems for the fifth Glymur PCIe Controller Pankaj Patil
2025-09-22 19:56 ` Rob Herring (Arm)
2025-09-26 21:15 ` Bjorn Helgaas [this message]
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