Re: [PATCH v3 4/8] iio: adc: ad4030: Reduce register access transfer speed

Jonathan Cameron
2025-09-28T09:53:27Z

On Fri, 26 Sep 2025 17:39:42 -0300
Marcelo Schmitt <marcelo.schmitt@analog.com> wrote:

> Configuration register accesses are not considered a critical path in terms
> of time to complete. Even though register access transfers can run at high
> speeds, nanosecond completion times are not required as device
> configuration is usually done step by step from user space. Also, high
> frequency transfers hinder debug with external tools since they require
> faster clocked equipment. Reduce register access transfer speed.

So making debug with external tools easier isn't usually a justification we'd
make to slow things down by default.

Is there another reason for this being useful as opposed to not a problem
to do? If it had been done this way in the first place I wouldn't have
minded, but to make a change I'd like either some others to jump in and
say, yes please do this, or a reason beyond you are using tooling that can't
cope with 80 MHz and don't want to hack the driver when you need
to slow it down (my tools can't cope with that rate either!)

J