From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7625027A90A for ; Tue, 30 Sep 2025 05:50:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759211452; cv=none; b=VRB9wKW3Uhs6NywLpahpx93nDRXyNnOMqnGMLrIyooi9E/tH0lEWKkx0/mqjtrc96f5kl0bIPp8JoTBJyqQ3o91tU3yXr2Qv+0mD7323MjIurOilIQMhiXlZf33gv5h/CXiXAz/wlsV+rZJ39bzwwd/re0pW8hj7+rT7ZD/QPf4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759211452; c=relaxed/simple; bh=iTx0Dgw6/NGdDmnjDpXwtxM3ls+MrtO4sIvE3+opA2Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OTmNXOrhrH0F7Vvtx4WRlQioeO6i//jVBJDFuTxy3XsOYyhq/eM3D/nKi2zfQBrcb84xWu8eKh6h1m1ALJt4ou6txHLLZ3oI4vZZcgpemF3eIZYwUjKfVE9E72dixKp6/fpv0HMUL45JRmUTK3itDP4K+86rwHJAbdNqX8eQFyM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=gifKMrKc; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="gifKMrKc" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 58U4Hp8t024901 for ; Tue, 30 Sep 2025 05:50:49 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= hUYDtG14iwXt6CshtaDwxA9smtoMJnlMfawF2rRoaMg=; b=gifKMrKclxrtGxLk 4rBp68Bl5B0XrOiBHgo+Ek0HHOeetPON/+M+lYt2jf4elx+NMkNH2DQcgy/w3qFp v7osQynKfDhFxD0Qx1W1tQgtLFxRDTe8pc2jdzRaMS39dfJcqu4NEqn/aYhq1tkd OtmsZrfIrMxPmtCG3Ym1+/oM8JcIds+wGGQHvdXcH0VX2l2QdWMZfTi1ZIz8ufnP C9A1zvQ8Wehp/JZxQN8PVbTOGIa/SErqVUcDj1UqjAWl7mGX319OwnLPCU6+nDUM 75CKEeaPghDkO2EJ1e4TY64P9zsGqxdlnZDzFYiv8VO++0293ceG4lKOkG6uxeYh MHBNcA== Received: from mail-pj1-f69.google.com (mail-pj1-f69.google.com [209.85.216.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 49e59n051b-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Tue, 30 Sep 2025 05:50:49 +0000 (GMT) Received: by mail-pj1-f69.google.com with SMTP id 98e67ed59e1d1-3307af9b55eso4739142a91.2 for ; Mon, 29 Sep 2025 22:50:49 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759211448; x=1759816248; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hUYDtG14iwXt6CshtaDwxA9smtoMJnlMfawF2rRoaMg=; b=FxPqIhjT1uvOUyyL+l5Ue1bhvdHgc7ZlKkSJ7SH8F3ddogzyjSgLf3mF+Obn5UKzV0 tHrWfkvz9gC169tpDgKI+E3Pu2nvTBpiwWRb4ImcvnC0QKypoKSp/Z3h1i50H4Wpxwvh p95UbFEXA9PaX5KNluGCssPlaA5ducwQ6mWB8FG1bgSpFv/KD6/4JcBqhdHNKbu1uMvf 6EYVEoTKbnk57Nw3F54ElkBPMewZw/IJxdNCn/UxpcjVxYxGSKAd0CrTS22ZtViqNeIk l4i9yDFxQ7NKDd6vI61UY6LLZKDWep0wZ5nIr2YyJ24EgYCANC5PKkKdABr0Mia9OQ9Y 5Wpw== X-Forwarded-Encrypted: i=1; AJvYcCXUd5wEtznn67HcWam1Dvjdwqw4xjCaJ5P5adHyqVkuDC4Wreufa/CjHMjbg3yavovDZlZJK3th546E@vger.kernel.org X-Gm-Message-State: AOJu0YxGFLwOHwg1/iZI9ToxNZAzmlovCqceQjMYXBNUkJWDEQv7NnVt Y4St4IyiVXKtzNy0crmCjD3nn/J5SEoblX/bl5qfSlrLkRAhneV38HSdULPU4rvl/3NnCB521W5 VyxCoJQXkXdzY4IJnpyKPNMVBGp9qw5c26vVIlLxrbE5Kbn0zmf/qNy0bbq5jbiH7 X-Gm-Gg: ASbGncvsxUWJ+cRvOM3L0ssn1ka7xIYKE4dFQAAMR+J0eP4+l8J6Oi1+ySRvQheculp twRqCzUdZk0FYyL6S3S+Wjwd2ENBZ1oqri/OX1WMRRwh05QIJ9SGDjvLMXBtEy1DYMh2wag9+bi elAQ/gYDSlMeYm8LrUCiGQlBjBEf06OJWCz24IaOzC1gmtz282euksSyZzI2NCo9AIvbRNAPSdS ujlpIcn1dIIdbtHwP9TDFK54eIn4rWn8QAJCPgvys9eBehJkGBuejl3yMeYBQxjt9IRPTnybfxf F4ON73DvyXqa8iPF2FOUr5LYBROqYV94Uf+F3DlUEDCARSx57UoBmtzvTMDuThCrOKLFoQ== X-Received: by 2002:a17:90b:1a86:b0:32e:e186:726d with SMTP id 98e67ed59e1d1-3342a2e08a1mr17586657a91.31.1759211448060; Mon, 29 Sep 2025 22:50:48 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGBv29jZXzsR2GHyzv4/aiF55cKo23OPq++pHW+jUt6OPLZ0TQSWk4QbBrVwj5PowUQlBWBaw== X-Received: by 2002:a17:90b:1a86:b0:32e:e186:726d with SMTP id 98e67ed59e1d1-3342a2e08a1mr17586627a91.31.1759211447597; Mon, 29 Sep 2025 22:50:47 -0700 (PDT) Received: from hu-akhilpo-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3341be23412sm19029779a91.20.2025.09.29.22.50.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Sep 2025 22:50:47 -0700 (PDT) From: Akhil P Oommen Date: Tue, 30 Sep 2025 11:18:13 +0530 Subject: [PATCH 08/17] drm/msm/adreno: Add MMU fault handler to adreno_gpu_func Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250930-kaana-gpu-support-v1-8-73530b0700ed@oss.qualcomm.com> References: <20250930-kaana-gpu-support-v1-0-73530b0700ed@oss.qualcomm.com> In-Reply-To: <20250930-kaana-gpu-support-v1-0-73530b0700ed@oss.qualcomm.com> To: Rob Clark , Bjorn Andersson , Konrad Dybcio , Sean Paul , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , Jonathan Marek , Jordan Crouse , Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, Akhil P Oommen X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1759211380; l=2518; i=akhilpo@oss.qualcomm.com; s=20240726; h=from:subject:message-id; bh=iTx0Dgw6/NGdDmnjDpXwtxM3ls+MrtO4sIvE3+opA2Q=; b=MrGaWbf42ncH24JynsUmGMasa2mINaJed6eMYoi/gzz6Y7t9s0yIQ5H8PlIqlwA9cPDCLVgVF vIbOkIclF6NBtnDJY0fAqoMVfUB0LG8GNmKX4udlGZcehELqKzVLBu/ X-Developer-Key: i=akhilpo@oss.qualcomm.com; a=ed25519; pk=lmVtttSHmAUYFnJsQHX80IIRmYmXA4+CzpGcWOOsfKA= X-Proofpoint-GUID: 7xaL1cyZOz7EFU1A3NFo_NNvVVnXDcEi X-Authority-Analysis: v=2.4 cv=O4g0fR9W c=1 sm=1 tr=0 ts=68db6fb9 cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=s_9S_yPA7-Eg1sbpcaoA:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-ORIG-GUID: 7xaL1cyZOz7EFU1A3NFo_NNvVVnXDcEi X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTI3MDAwMSBTYWx0ZWRfX/CCoynvyBJPA knbzHy5Q1QHfvcevq/T3HBkHLfFeafq7PRqHT71ZDupsYgr86yXgewwxert9x3gAEysP4L5MnzE QFZQOC5dmc4fpyPxLROrcLJURQvTYAAfy4zxJksQpYnQ2mCD5sMuyIaj8Ln+3ft7nInIFmhqsLA H79SZ/NrFkvcZBKo1XkJGU8gm52cMFhpiSl/WXQ9wW9LEUGkhDfhLpduud2qNAr+HJtE65z6f0h Er0rpdHLok8Xct0MoXAGzSJSeelINyp/h9NtWnWgWN7+hqedYieSTLG+z7OJK8cf4kYkGhupl8e ChN2AYRB7fqEACJygoZgFHlweu6o4TyPKDXcrqTcbTkkb+Rle97NAoNGScMOUt1nqAo24TxKbCT JN3WWIEV3Z86HWGT77PDJ4Qsn6XWmQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-30_01,2025-09-29_04,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 phishscore=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 spamscore=0 impostorscore=0 bulkscore=0 suspectscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2509150000 definitions=main-2509270001 Move MMU fault handler for each generation to adreno function list. This will help to use common code for mmu pagefault handler registration between a6x/a7x and a8x layer. Signed-off-by: Akhil P Oommen --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 5 ++++- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 + 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 02725d28c607e7815587e9589c8344da3341c78d..27168f3a7264f2651cb41c8d59e6dc80ddba4262 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -2613,7 +2613,7 @@ static struct msm_gpu *a6xx_gpu_init(struct drm_device *dev) adreno_gpu->uche_trap_base = 0x1fffffffff000ull; msm_mmu_set_fault_handler(to_msm_vm(gpu->vm)->mmu, gpu, - a6xx_fault_handler); + adreno_gpu->funcs->mmu_fault_handler); ret = a6xx_calc_ubwc_config(adreno_gpu); if (ret) { @@ -2659,6 +2659,7 @@ const struct adreno_gpu_funcs a6xx_gpu_funcs = { .get_timestamp = a6xx_gmu_get_timestamp, .submit_flush = a6xx_flush, .bus_halt = a6xx_bus_clear_pending_transactions, + .mmu_fault_handler = a6xx_fault_handler, }; const struct adreno_gpu_funcs a6xx_gmuwrapper_funcs = { @@ -2691,6 +2692,7 @@ const struct adreno_gpu_funcs a6xx_gmuwrapper_funcs = { .get_timestamp = a6xx_get_timestamp, .submit_flush = a6xx_flush, .bus_halt = a6xx_bus_clear_pending_transactions, + .mmu_fault_handler = a6xx_fault_handler, }; const struct adreno_gpu_funcs a7xx_gpu_funcs = { @@ -2726,4 +2728,5 @@ const struct adreno_gpu_funcs a7xx_gpu_funcs = { .submit_flush = a6xx_flush, .feature_probe = a7xx_gpu_feature_probe, .bus_halt = a6xx_bus_clear_pending_transactions, + .mmu_fault_handler = a6xx_fault_handler, }; diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h index 991481adf2261f09912786ada3574f9f144953c0..b27974d97c7512ecae326eb2d22238330d6c52f0 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h @@ -80,6 +80,7 @@ struct adreno_gpu_funcs { void (*submit_flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring); int (*feature_probe)(struct msm_gpu *gpu); void (*bus_halt)(struct adreno_gpu *adreno_gpu, bool gx_off); + int (*mmu_fault_handler)(void *arg, unsigned long iova, int flags, void *data); }; struct adreno_reglist { -- 2.51.0