From: Conor Dooley <conor@kernel.org>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Conor Dooley <conor.dooley@microchip.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [RFC 2/5] dt-bindings: pinctrl: add pic64gx "gpio2" pinmux
Date: Wed, 1 Oct 2025 16:48:04 +0100 [thread overview]
Message-ID: <20251001-recount-exquisite-6b304e8813b9@spud> (raw)
In-Reply-To: <20251001-grunge-unroll-d7a48294570a@spud>
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On Wed, Oct 01, 2025 at 04:47:12PM +0100, Conor Dooley wrote:
> On Wed, Oct 01, 2025 at 01:32:37PM +0200, Linus Walleij wrote:
> > On Fri, Sep 26, 2025 at 4:33 PM Conor Dooley <conor@kernel.org> wrote:
> >
> > > pin role (1/0)
> > > --- ----------
> > > E14 MAC_0_MDC/GPIO_2_0
> > > E15 MAC_0_MDIO/GPIO_2_1
> > > F16 MAC_1_MDC/GPIO_2_2
> > > F17 MAC_1_MDIO/GPIO_2_3
> >
> > So this is a group you can name "mac_grp" and a function
> > you can name "mac".
> >
> > > D19 SPI_0_CLK/GPIO_2_4
> > > B18 SPI_0_SS0/GPIO_2_5
> > (...)
> > > E19 SPI_0_DO/GPIO_2_10
> > > C7 SPI_0_DI/GPIO_2_11
> >
> > These pins would be "spi0_grp", function "spi0".
> >
> > etc. No need for "pinmux" properties just use classix
> > group and function strings.
>
> tbh, I found it hard to understand the "line" between using a pinmux
> property and where stuff should be described in groups or functions in a
> driver. What is that line?
You may have noticed that I never really review pinctrl bindings, and it
is the lack of experience with this kind of decision that's why I never
do it.
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next prev parent reply other threads:[~2025-10-01 15:48 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-26 14:33 [RFC 0/5] microchip mpfs/pic64gx pinctrl questions Conor Dooley
2025-09-26 14:33 ` [RFC 1/5] dt-bindings: pinctrl: add polarfire soc iomux0 pinmux Conor Dooley
2025-09-26 14:33 ` [RFC 2/5] dt-bindings: pinctrl: add pic64gx "gpio2" pinmux Conor Dooley
2025-10-01 11:32 ` Linus Walleij
2025-10-01 15:47 ` Conor Dooley
2025-10-01 15:48 ` Conor Dooley [this message]
2025-10-13 10:56 ` Linus Walleij
2025-10-13 11:22 ` Conor Dooley
2025-09-26 14:33 ` [RFC 3/5] pinctrl: add polarfire soc iomux0 pinmux driver Conor Dooley
2025-10-01 11:34 ` Linus Walleij
2025-10-01 11:36 ` Linus Walleij
2025-10-01 15:45 ` Conor Dooley
2025-10-13 11:02 ` Linus Walleij
2025-10-13 11:42 ` Conor Dooley
2025-10-14 10:27 ` Linus Walleij
2025-09-26 14:33 ` [RFC 4/5] pinctrl: add pic64gx "gpio2" " Conor Dooley
2025-09-26 14:33 ` [RFC 5/5] riscv: dts: microchip: add pinctrl nodes for iomux0 Conor Dooley
2025-10-01 11:29 ` [RFC 0/5] microchip mpfs/pic64gx pinctrl questions Linus Walleij
2025-10-01 16:00 ` Conor Dooley
2025-10-01 16:15 ` Conor Dooley
2025-10-09 15:55 ` Conor Dooley
2025-10-13 13:27 ` Linus Walleij
2025-10-13 13:55 ` Conor Dooley
2025-10-14 10:33 ` Linus Walleij
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