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* [PATCH v2 0/8] RISC-V: Add support for Tenstorrent Blackhole SoC
@ 2025-10-06 21:21 Drew Fustini
  2025-10-06 21:21 ` [PATCH v2 1/8] dt-bindings: vendor-prefixes: Add Tenstorrent AI ULC Drew Fustini
                   ` (8 more replies)
  0 siblings, 9 replies; 17+ messages in thread
From: Drew Fustini @ 2025-10-06 21:21 UTC (permalink / raw)
  To: Paul Walmsley, Palmer Dabbelt, Alexandre Ghiti, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, Samuel Holland, Daniel Lezcano,
	Thomas Gleixner, Anup Patel, Arnd Bergmann, Joel Stanley,
	Joel Stanley, Michael Neuling, Nicholas Piggin, Michael Ellerman,
	Andy Gross, Anirudh Srinivasan
  Cc: devicetree, linux-kernel, linux-riscv, Drew Fustini

Enable support for the Tenstorrent Blackhole SoC in the Blackhole P100
and P150 PCIe cards [1]. The Blackhole SoC contains four RISC-V CPU
tiles consisting of 4x SiFive X280 cores. Each tile is capable of
running an instance of Linux.

There is a public Linux-on-Blackhole project [2] that enables users to
boot Linux on Blackhole PCIe cards. A boot script on the PCIe host
loads the kernel image and the rootfs into DDR memory and then takes
the X280 cores out of reset.

All the low-level SoC initialization is handled by firmware [3] running
on a separate management core in the Blackhole SoC. Linux on the X280
cores does not need to deal with any clocks, reset, etc. The management
core firmware also controls the PCIe EP functionality. The tt-kmd Linux
kernel driver [4] on the PCIe host allows the host to interact with the
DDR memory on the Blackhole PCIe card along with other tiles in the SoC
accessible from the NoC [5].

There is a virtual UART implemented in OpenSBI [6] that allows a console
program on the PCIe host to communicate through shared memory with Linux
running on the Blackhole. This does require CONFIG_HVC_RISCV_SBI which
is currently hidden behind CONFIG_NONPORTABLE. I would like Blackhole to
work with defconfig, so I'm looking into possible ways of solving the
issue that caused HVC SBI to be guarded by NONPORTABLE [7].

The public Linux-on-Blackhole project does also make use of virtio to
provide networking and storage. However, this relies on changes in our
downstream kernel branch [8], so I've removed those dt nodes from this
upstream dts series. We hope to eventually leverage the virtio-msg spec
to upstream the virtio functionality, too.

I have also dropped the bootargs from this series. Instead, I will add
the ability to fixup the dtb to the boot script on the host [9]. It does
need 'console=hvc0' to ensure the full boot output appears in the
console program on the host. I also dropped the pmem node from this
series as I don't see any upstream users of pmem. I have been using pmem
for the rootfs, so I'll update the boot script to add the pmem node and
amend 'root=/dev/pmem0' in bootargs.

TL;DR:
The goal for upstreaming this rather minimal device tree in this series
is to make it possible to boot mainline kernel builds. I attended the
recent KernelCI workshop, and there are not currently many RISC-V boards
doing boot tests. I think the Blackhole cards could help improve the
situation once Blackhole is able to boot important trees like mainline
and next. The HVC SBI console is sufficient for boot testing.

[1] https://tenstorrent.com/hardware/blackhole
[2] https://github.com/tenstorrent/tt-bh-linux
[3] https://github.com/tenstorrent/tt-zephyr-platforms
[4] https://github.com/tenstorrent/tt-kmd
[5] https://github.com/tenstorrent/tt-isa-documentation/blob/main/BlackholeA0/
[6] https://github.com/tenstorrent/opensbi/
[7] https://lore.kernel.org/all/20240214153429.16484-2-palmer@rivosinc.com/
[8] https://github.com/tenstorrent/linux/
[9] https://github.com/tenstorrent/tt-bh-linux/blob/dfustini/kernelci/boot.py

Changes in v2:
 - Remove '-a0' from compatible strings as Rob advised silicon revisions
   are not normally included in compatibles
 - Add ARCH_TENSTORRENT to defconfig per Conor's suggestion
 - Fix unit address for memory device tree node
 - Remove legacy 'riscv,isa' property from cpu dt nodes
 - Remove 'riscv,cboz-block-size' as the cores do not support Zicboz
 - Link to v1: https://lore.kernel.org/linux-riscv/20250913-tt-bh-dts-v1-0-ddb0d6860fe5@tenstorrent.com/

To: Paul Walmsley <paul.walmsley@sifive.com>
To: Palmer Dabbelt <palmer@dabbelt.com>
To: Alexandre Ghiti <alex@ghiti.fr>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Samuel Holland <samuel.holland@sifive.com>
To: Daniel Lezcano <daniel.lezcano@linaro.org>
To: Thomas Gleixner <tglx@linutronix.de>
To: Anup Patel <anup@brainfault.org>
To: Arnd Bergmann <arnd@arndb.de>
To: Joel Stanley <jms@oss.tenstorrent.com>
To: Joel Stanley <joel@jms.id.au>
To: Michael Neuling <mikey@neuling.org>
To: Nicholas Piggin <npiggin@gmail.com>
To: Michael Ellerman <mpe@kernel.org>
To: Andy Gross <agross@kernel.org>
To: Anirudh Srinivasan <asrinivasan@tenstorrent.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-riscv@lists.infradead.org

Signed-off-by: Drew Fustini <dfustini@oss.tenstorrent.com>
---
Drew Fustini (8):
      dt-bindings: vendor-prefixes: Add Tenstorrent AI ULC
      dt-bindings: riscv: Add Tenstorrent Blackhole compatible
      dt-bindings: riscv: cpus: Add SiFive X280 compatible
      dt-bindings: timers: Add Tenstorrent Blackhole compatible
      dt-bindings: interrupt-controller: Add Tenstorrent Blackhole compatible
      riscv: dts: Add Tenstorrent Blackhole SoC PCIe cards
      riscv: Kconfig.socs: Add ARCH_TENSTORRENT for Tenstorrent SoCs
      riscv: defconfig: Enable Tenstorrent SoCs

 .../interrupt-controller/sifive,plic-1.0.0.yaml    |   1 +
 Documentation/devicetree/bindings/riscv/cpus.yaml  |   1 +
 .../devicetree/bindings/riscv/tenstorrent.yaml     |  28 ++++++
 .../devicetree/bindings/timer/sifive,clint.yaml    |   1 +
 .../devicetree/bindings/vendor-prefixes.yaml       |   2 +
 MAINTAINERS                                        |   9 ++
 arch/riscv/Kconfig.socs                            |   8 ++
 arch/riscv/boot/dts/Makefile                       |   1 +
 arch/riscv/boot/dts/tenstorrent/Makefile           |   2 +
 arch/riscv/boot/dts/tenstorrent/blackhole-card.dts |  14 +++
 arch/riscv/boot/dts/tenstorrent/blackhole.dtsi     | 104 +++++++++++++++++++++
 arch/riscv/configs/defconfig                       |   1 +
 12 files changed, 172 insertions(+)
---
base-commit: e5f0a698b34ed76002dc5cff3804a61c80233a7a
change-id: 20250929-tt-bh-dts-fe25dc015cdf

Best regards,
-- 
Drew Fustini <dfustini@oss.tenstorrent.com>


^ permalink raw reply	[flat|nested] 17+ messages in thread
end of thread, other threads:[~2025-10-09 20:57 UTC | newest]

Thread overview: 17+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-10-06 21:21 [PATCH v2 0/8] RISC-V: Add support for Tenstorrent Blackhole SoC Drew Fustini
2025-10-06 21:21 ` [PATCH v2 1/8] dt-bindings: vendor-prefixes: Add Tenstorrent AI ULC Drew Fustini
2025-10-06 21:21 ` [PATCH v2 2/8] dt-bindings: riscv: Add Tenstorrent Blackhole compatible Drew Fustini
2025-10-06 21:21 ` [PATCH v2 3/8] dt-bindings: riscv: cpus: Add SiFive X280 compatible Drew Fustini
2025-10-06 21:21 ` [PATCH v2 4/8] dt-bindings: timers: Add Tenstorrent Blackhole compatible Drew Fustini
2025-10-09 20:56   ` Rob Herring (Arm)
2025-10-06 21:21 ` [PATCH v2 5/8] dt-bindings: interrupt-controller: " Drew Fustini
2025-10-09 20:57   ` Rob Herring (Arm)
2025-10-06 21:21 ` [PATCH v2 6/8] riscv: dts: Add Tenstorrent Blackhole SoC PCIe cards Drew Fustini
2025-10-07  1:20   ` Krzysztof Kozlowski
2025-10-07  2:56     ` Joel Stanley
2025-10-07  3:02       ` Krzysztof Kozlowski
2025-10-07  3:38     ` Drew Fustini
2025-10-06 21:21 ` [PATCH v2 7/8] riscv: Kconfig.socs: Add ARCH_TENSTORRENT for Tenstorrent SoCs Drew Fustini
2025-10-06 21:21 ` [PATCH v2 8/8] riscv: defconfig: Enable " Drew Fustini
2025-10-07  1:02 ` [PATCH v2 0/8] RISC-V: Add support for Tenstorrent Blackhole SoC Joel Stanley
2025-10-07  3:00   ` Joel Stanley

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