From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 708912F9D83; Wed, 8 Oct 2025 15:33:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759937627; cv=none; b=j5e7BN5Hw7dhKsk7XgUvtTA3U1d86F3dEzeZnDVsFjaRzweS2J/8+euNl6UlBKRQEB2ewRD5Tlad4zf8DU+7IUy9zTGqo8Rl70YwQ4g2899TbJlyiXcuqkOrJRtZawO/puRfcXiZSwCN3APvB0zwFZrhp73aCu4hTJPG2ye4FKs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759937627; c=relaxed/simple; bh=eQHtovZz3J+7gu7HBlntuaYEQB1cnKnkmep03Dbkmg0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=l1v59/4nvUmylziN0fsokr45zhCcrkY1+qAnviULgt7XS/47KR8in9oUkcUz7BIJEYo0Wp873NoMo7jGMNbTh3iyIrgXh+lcjSjPHj5dzxRrgF47FR0+5fOhN+crlT+zxNU0TBIQxGrwES+IAlYdr4240z/qBgwj4ZZFwilcskc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=UuBkelXj; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="UuBkelXj" Received: by smtp.kernel.org (Postfix) with ESMTPS id F1BD4C2BCAF; Wed, 8 Oct 2025 15:33:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1759937627; bh=eQHtovZz3J+7gu7HBlntuaYEQB1cnKnkmep03Dbkmg0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=UuBkelXjEah3Ya4q0G2yUX1P+zOdMgaa3WIpPKwz6+k9UMi/558/isO0LPZDzVIT0 +mg0Z1h0Ped3qmeGjkjdVBki4aclM9u7NcRX5JAOF2zKoY8dE/tJPx/U2fxhsi5ld0 j6CqcZ4vmxVCxe7uqWpT8aS7XX98q+LqzT33bdMULmz3Y094THm//9Wo9P9pVlaZvt Yu7yKmnRsPniRWcm8XSByANsUpgF8WRrzCfdMeP3yiWk5ZxKXhLYTprsIYNoCfigz0 kf2Lj4FXAnlnYgGXpsoyCHR3e6Hk+HX2qu7iC//PdPQUeG2GZtxcNxGYLfW+3+BncH 99Y7KuaOfIAnw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id E92E6CAC5BB; Wed, 8 Oct 2025 15:33:46 +0000 (UTC) From: George Moussalem via B4 Relay Date: Wed, 08 Oct 2025 19:32:59 +0400 Subject: [PATCH v17 7/9] arm64: dts: qcom: ipq5018: add pwm node Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20251008-ipq-pwm-v17-7-9bd43edfc7f7@outlook.com> References: <20251008-ipq-pwm-v17-0-9bd43edfc7f7@outlook.com> In-Reply-To: <20251008-ipq-pwm-v17-0-9bd43edfc7f7@outlook.com> To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Baruch Siach , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, George Moussalem , Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1759937623; l=1233; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=cPA8fq8v3fox0e7wzkxLxHKITff0qaTwjV7zqQLPPLc=; b=MnC5ttIB1kPiD72LlS4Js1HP1sbfZx5WSHY18v4U2PfTowdEzXlt/LNjDO22vnvwRqUk1JRVE 0VBTbswMQH7BwkkDCN6jlg5IHzIg6+4CipGT8zyjgWrc0shZNB+L3Fm X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Describe the PWM block on IPQ5018. Although PWM is in the TCSR area, make pwm its own node as simple-mfd has been removed from the bindings and as such hardware components should have its own node. Reviewed-by: Dmitry Baryshkov Signed-off-by: George Moussalem --- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi index f024b3cba33f6100ac3f4d45598ff2356e026dcf..d4bdf2884aa7f73711cf8a37b7a4c4e7e54c503c 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -453,6 +453,16 @@ tcsr: syscon@1937000 { reg = <0x01937000 0x21000>; }; + pwm: pwm@1941010 { + compatible = "qcom,ipq5018-pwm", "qcom,ipq6018-pwm"; + reg = <0x01941010 0x20>; + clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clock-rates = <100000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + sdhc_1: mmc@7804000 { compatible = "qcom,ipq5018-sdhci", "qcom,sdhci-msm-v5"; reg = <0x7804000 0x1000>; -- 2.51.0