From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mout-p-101.mailbox.org (mout-p-101.mailbox.org [80.241.56.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E2A4280CF6; Sat, 11 Oct 2025 17:04:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.241.56.151 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760202279; cv=none; b=dI89hJj+ehllH4JaHQoUG712CRoYS3Op7kOiItwkzToF8PGGbNG2jh382C3SnW1Za4cYQzM7qkwRvzn0DLSDeXmE8eA8Yp/CXp6O1hGIBxvmuM6Szw4kLKYDRrMx32mQjqmmnbUyGLHyGAWApuoL7mEs7iaa1QXtpo2baEak10I= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760202279; c=relaxed/simple; bh=1Vj03AwZSWJYF1jcqrTfEphWbINu/TtxYI3ciRX6zBo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=o2A2C9mUCK+xjQybPZSwWCsHDqwUB1G1x3S9KOvg2/lLrRDyVCdtpo+y08KwS3ZkRaquDgnP5E0larg2DwagozSW0Xr+KKmm0kRRE+B8cnnHfNJ3SQCjRAdfuFXeuzgiE0aymo1dBooj6LjSWCfddbLAjPKhKPYX+ajRlwyLwDg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org; spf=pass smtp.mailfrom=mailbox.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=PNf/bEi5; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=Vn59NB66; arc=none smtp.client-ip=80.241.56.151 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mailbox.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="PNf/bEi5"; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="Vn59NB66" Received: from smtp102.mailbox.org (smtp102.mailbox.org [IPv6:2001:67c:2050:b231:465::102]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-101.mailbox.org (Postfix) with ESMTPS id 4ckVMm38Lbz9tDZ; Sat, 11 Oct 2025 19:04:36 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1760202276; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Lk3Rjyeus3C9NAKENHUJ5fCfgM5p+pUPtcQUUdf0M2s=; b=PNf/bEi5UmwSIw7LftOEG6yTn05zV8q7Di1J+9KdT6NAbfthBasd+PbByWcw5g96hEJiGf 4/jE5BUeLnTIIrVpezHP+HxlBkcIGehYwHUXYSz9lA7EZEyTQ9lMjUaGgrXhk+Gk7mU/eQ Fp0v2UvgdbKYy6uBvkT8t1vB1aQ9xjpXIPU+gZQMjO7HJkQqoPeEswxLHgTrXm+opbLsY0 iPmEJNkbZ5hnvYd9WKHulHl/7Ha6/KQJdoyvmjVfym0gtJlif/5K46/bLtNI88uzygetaO EUO98Y45867+ifLihhqYIwyf8DAIwLDCvCNGTgfHWCd3hstg2GY4dbbc73so0A== Authentication-Results: outgoing_mbo_mout; dkim=pass header.d=mailbox.org header.s=mail20150812 header.b=Vn59NB66; spf=pass (outgoing_mbo_mout: domain of marek.vasut@mailbox.org designates 2001:67c:2050:b231:465::102 as permitted sender) smtp.mailfrom=marek.vasut@mailbox.org From: Marek Vasut DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1760202274; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Lk3Rjyeus3C9NAKENHUJ5fCfgM5p+pUPtcQUUdf0M2s=; b=Vn59NB66csKLpwuqIH9fKkZu7byxv//rOSaMAsG9UdmjDfizMtjoTzd0sToLFjCi8bq24w 01FyCdOBvQ6YsV1+/CAM+0CVeVk93++kCK/LEX3Zgh5QfF3SsBgTsGXpG3j4noZ4ptRS1x 07WbC2DyPKu+sCE///L/A3uswipRqVJ2irRjzN59ccKZOFVF+v5xV+sBdOHwC/W4kpIS28 01cj5Gqpi71OkpKqqg84/Tn2sC9goGwmoH5/xL4V6n6s3BurcxVGvL6iK+ga8CpqBEnngc Antni4rHRENzhc+EnAKQKg0LWBslbE4IIzC1pvmccqfTb/L4JKpzJSEiyVr+SQ== To: dri-devel@lists.freedesktop.org Cc: Marek Vasut , Abel Vesa , Conor Dooley , Fabio Estevam , Krzysztof Kozlowski , Laurent Pinchart , Liu Ying , Lucas Stach , Peng Fan , Pengutronix Kernel Team , Rob Herring , Shawn Guo , Thomas Zimmermann , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Subject: [PATCH 36/39] drm/bridge: fsl-ldb: Add i.MX95 support Date: Sat, 11 Oct 2025 18:51:51 +0200 Message-ID: <20251011170213.128907-37-marek.vasut@mailbox.org> In-Reply-To: <20251011170213.128907-1-marek.vasut@mailbox.org> References: <20251011170213.128907-1-marek.vasut@mailbox.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-MBO-RS-ID: df8c5370bfe38e02228 X-MBO-RS-META: 7857bnidkfoow6m87bmkwenfakofii1p X-Rspamd-Queue-Id: 4ckVMm38Lbz9tDZ Add support for i.MX95 SoC variant of the LDB. This variant supports single channel and all configuration is done via single register, but there are two instances of this IP preceded by another bridge, which handles the dual-lane configuration instead. This is also the reason for special-case handling of input format, where the preceding bridge needs the format details as well. Signed-off-by: Marek Vasut --- Cc: Abel Vesa Cc: Conor Dooley Cc: Fabio Estevam Cc: Krzysztof Kozlowski Cc: Laurent Pinchart Cc: Liu Ying Cc: Lucas Stach Cc: Peng Fan Cc: Pengutronix Kernel Team Cc: Rob Herring Cc: Shawn Guo Cc: Thomas Zimmermann Cc: devicetree@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: imx@lists.linux.dev Cc: linux-arm-kernel@lists.infradead.org Cc: linux-clk@vger.kernel.org --- drivers/gpu/drm/bridge/fsl-ldb.c | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/fsl-ldb.c b/drivers/gpu/drm/bridge/fsl-ldb.c index c54caea0b63fc..1560438e4cb10 100644 --- a/drivers/gpu/drm/bridge/fsl-ldb.c +++ b/drivers/gpu/drm/bridge/fsl-ldb.c @@ -58,6 +58,7 @@ enum fsl_ldb_devtype { IMX6SX_LDB, IMX8MP_LDB, IMX93_LDB, + IMX95_LDB, }; struct fsl_ldb_devdata { @@ -73,6 +74,9 @@ static const struct fsl_ldb_devdata fsl_ldb_devdata[] = { [IMX93_LDB] = { .lvds_en_bit = true, }, + [IMX95_LDB] = { + .lvds_en_bit = true, + }, }; struct fsl_ldb { @@ -235,7 +239,7 @@ static void fsl_ldb_atomic_disable(struct drm_bridge *bridge, clk_disable_unprepare(fsl_ldb->clk); } -#define MAX_INPUT_SEL_FORMATS 1 +#define MAX_INPUT_SEL_FORMATS 4 static u32 * fsl_ldb_atomic_get_input_bus_fmts(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, @@ -244,17 +248,26 @@ fsl_ldb_atomic_get_input_bus_fmts(struct drm_bridge *bridge, u32 output_fmt, unsigned int *num_input_fmts) { + struct fsl_ldb *fsl_ldb = to_fsl_ldb(bridge); u32 *input_fmts; *num_input_fmts = 0; - input_fmts = kcalloc(MAX_INPUT_SEL_FORMATS, sizeof(*input_fmts), + input_fmts = kcalloc(MAX_INPUT_SEL_FORMATS, MAX_INPUT_SEL_FORMATS * sizeof(*input_fmts), GFP_KERNEL); if (!input_fmts) return NULL; - input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24; - *num_input_fmts = MAX_INPUT_SEL_FORMATS; + if (of_device_is_compatible(fsl_ldb->dev->of_node, "fsl,imx95-ldb")) { + input_fmts[0] = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG; + input_fmts[1] = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG; + input_fmts[2] = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA; + input_fmts[3] = MEDIA_BUS_FMT_FIXED; + *num_input_fmts = 4; + } else { + input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24; + *num_input_fmts = 1; + } return input_fmts; } @@ -396,6 +409,8 @@ static const struct of_device_id fsl_ldb_match[] = { .data = &fsl_ldb_devdata[IMX8MP_LDB], }, { .compatible = "fsl,imx93-ldb", .data = &fsl_ldb_devdata[IMX93_LDB], }, + { .compatible = "fsl,imx95-ldb", + .data = &fsl_ldb_devdata[IMX95_LDB], }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, fsl_ldb_match); -- 2.51.0