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* [PATCH] dt-bindings: clk: rs9: Fix DIF pattern match
@ 2025-10-14 10:46 Marek Vasut
  2025-10-14 22:15 ` Conor Dooley
  0 siblings, 1 reply; 2+ messages in thread
From: Marek Vasut @ 2025-10-14 10:46 UTC (permalink / raw)
  To: linux-clk
  Cc: Marek Vasut, Conor Dooley, Geert Uytterhoeven,
	Krzysztof Kozlowski, Michael Turquette, Rob Herring, Stephen Boyd,
	devicetree, linux-renesas-soc

The pattern match [0-19] is incorrect and does not cover range of 0..19,
use pattern 1?[0-9] to cover range 0..19 instead. Update the example to
validate all parts of the pattern match and prevent such failures in the
future.

Fixes: 26c1bc67aa2f ("dt-bindings: clk: rs9: Add Renesas 9-series I2C PCIe clock generator")
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: linux-renesas-soc@vger.kernel.org
---
 .../devicetree/bindings/clock/renesas,9series.yaml    | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/clock/renesas,9series.yaml b/Documentation/devicetree/bindings/clock/renesas,9series.yaml
index af6319697b1c0..a85f78ce29702 100644
--- a/Documentation/devicetree/bindings/clock/renesas,9series.yaml
+++ b/Documentation/devicetree/bindings/clock/renesas,9series.yaml
@@ -62,7 +62,7 @@ properties:
     description: Output clock down spread in pcm (1/1000 of percent)
 
 patternProperties:
-  "^DIF[0-19]$":
+  "^DIF1?[0-9]$":
     type: object
     description:
       Description of one of the outputs (DIF0..DIF19).
@@ -107,6 +107,15 @@ examples:
             DIF0 {
                 renesas,slew-rate = <3000000>;
             };
+
+            /* Not present on 9FGV0241, used for DT validation only */
+            DIF2 {
+                renesas,slew-rate = <2000000>;
+            };
+
+            DIF19 {
+                renesas,slew-rate = <3000000>;
+            };
         };
     };
 
-- 
2.51.0


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] dt-bindings: clk: rs9: Fix DIF pattern match
  2025-10-14 10:46 [PATCH] dt-bindings: clk: rs9: Fix DIF pattern match Marek Vasut
@ 2025-10-14 22:15 ` Conor Dooley
  0 siblings, 0 replies; 2+ messages in thread
From: Conor Dooley @ 2025-10-14 22:15 UTC (permalink / raw)
  To: Marek Vasut
  Cc: linux-clk, Conor Dooley, Geert Uytterhoeven, Krzysztof Kozlowski,
	Michael Turquette, Rob Herring, Stephen Boyd, devicetree,
	linux-renesas-soc

[-- Attachment #1: Type: text/plain, Size: 2116 bytes --]

On Tue, Oct 14, 2025 at 12:46:03PM +0200, Marek Vasut wrote:
> The pattern match [0-19] is incorrect and does not cover range of 0..19,
> use pattern 1?[0-9] to cover range 0..19 instead. Update the example to
> validate all parts of the pattern match and prevent such failures in the
> future.
> 
> Fixes: 26c1bc67aa2f ("dt-bindings: clk: rs9: Add Renesas 9-series I2C PCIe clock generator")
> Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

> ---
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: Geert Uytterhoeven <geert+renesas@glider.be>
> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Stephen Boyd <sboyd@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: linux-clk@vger.kernel.org
> Cc: linux-renesas-soc@vger.kernel.org
> ---
>  .../devicetree/bindings/clock/renesas,9series.yaml    | 11 ++++++++++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/renesas,9series.yaml b/Documentation/devicetree/bindings/clock/renesas,9series.yaml
> index af6319697b1c0..a85f78ce29702 100644
> --- a/Documentation/devicetree/bindings/clock/renesas,9series.yaml
> +++ b/Documentation/devicetree/bindings/clock/renesas,9series.yaml
> @@ -62,7 +62,7 @@ properties:
>      description: Output clock down spread in pcm (1/1000 of percent)
>  
>  patternProperties:
> -  "^DIF[0-19]$":
> +  "^DIF1?[0-9]$":
>      type: object
>      description:
>        Description of one of the outputs (DIF0..DIF19).
> @@ -107,6 +107,15 @@ examples:
>              DIF0 {
>                  renesas,slew-rate = <3000000>;
>              };
> +
> +            /* Not present on 9FGV0241, used for DT validation only */
> +            DIF2 {
> +                renesas,slew-rate = <2000000>;
> +            };
> +
> +            DIF19 {
> +                renesas,slew-rate = <3000000>;
> +            };
>          };
>      };
>  
> -- 
> 2.51.0
> 

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