From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.zeus03.de (zeus03.de [194.117.254.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9CF1A305063 for ; Tue, 14 Oct 2025 11:30:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=194.117.254.33 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760441429; cv=none; b=gbCTHW3r4+v8XTbZhGhZjZ5QbJi5uchi5pqf7OXBNyuREqgTgRfETSZGtgichfhdO7zj5rbYml+Rf2vsmU7lgBtYuF/EaOQkQmoMMty+5Cr8lKyw4JH/Q6JhW75F8f/CQeGVMKZ4rRfuU/3VG3GLGdMqjut4SyeUVjBm/fTf4Gk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760441429; c=relaxed/simple; bh=xKTYsXPMGOMKMV/jt+4Z9kaeJjZ4nbFhnUfdLzk38tM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Suzzn2se1gTzyaLSE1CRKcNX6SVDELrSB4SzUt4XFBXx8nw/etDCFBF41CMhOEH6x9jetiWbLWOuvsXkM9KQ/wfqf9XpH06IG0+lsR7eOyadbNdMDyrd3BxISRJ4a2VT4GO9d9V97PcnFEmWs/XZAr8VrfitGcZeWv2bgVeBXdM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com; spf=pass smtp.mailfrom=sang-engineering.com; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b=dZ9ek50b; arc=none smtp.client-ip=194.117.254.33 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b="dZ9ek50b" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= sang-engineering.com; h=from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; s=k1; bh=m2Ce9z697ssvL8uDRJI2+5HkTIC8S6bwRAdA0cAsyWg=; b=dZ9ek5 0brAbd80iuMBUeh0ftOxJgK2OsXYBeX7Mv+do0fVcvEcG7KaT+RTiyrGhMg4PgJW o4Ga+M92oOSWkHGXsoNcUTwpXq1eYJu+ZTF1b+YXTv8joNuHXZ/NGQphLlupitLE ivipDgVj15IgP1Oz/PlHmHFapR3tPBYwnFkXsuziOnFmo5dTnEeIfxonbioiZT0N aQKyIOMUaPHm4WT9I4k97jXjI1YEqEh0LoWvhKVHqvJzY/ua0oiOy9211MXFW2eq feBxC6zRRLJPLDAUwtEi9WFKO7+rjKkxOKWVdNzjhV7OXaZAkPLLfRdjzEbWu1YP GELhXyAkA42NJW7Q== Received: (qmail 2943660 invoked from network); 14 Oct 2025 13:30:18 +0200 Received: by mail.zeus03.de with UTF8SMTPSA (TLS_AES_256_GCM_SHA384 encrypted, authenticated); 14 Oct 2025 13:30:18 +0200 X-UD-Smtp-Session: l3s3148p1@6CphtRxByN4gAwDPXwQHAL/S9V79e5yL From: Wolfram Sang To: linux-renesas-soc@vger.kernel.org Cc: Wolfram Sang , Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 1/2] dt-bindings: watchdog: Add Renesas WWDT Date: Tue, 14 Oct 2025 13:29:53 +0200 Message-ID: <20251014112953.25712-5-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20251014112953.25712-4-wsa+renesas@sang-engineering.com> References: <20251014112953.25712-4-wsa+renesas@sang-engineering.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Describe the Window Watchdog Timer found on Renesas R-Car SoCs from late Gen3 onwards. Signed-off-by: Wolfram Sang --- Note: Despite the name, V3U is considered to be a Gen4 SoC. Changes since v1: * support not only V4H but all Gen3/4 SoCs having this WWDT * handle the two-resets exception for V3U and S4 * switch order of clocks, so it is the same as for the resets (for resets, "cnt" is always present and "bus" is optional) * rename the file to match the base compatible * require interrupts and resets * drop unneeded label from the example .../watchdog/renesas,rcar-gen3-wwdt.yaml | 114 ++++++++++++++++++ 1 file changed, 114 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/renesas,rcar-gen3-wwdt.yaml diff --git a/Documentation/devicetree/bindings/watchdog/renesas,rcar-gen3-wwdt.yaml b/Documentation/devicetree/bindings/watchdog/renesas,rcar-gen3-wwdt.yaml new file mode 100644 index 000000000000..ffafe9a6d3f5 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/renesas,rcar-gen3-wwdt.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/renesas,rcar-gen3-wwdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas Window Watchdog Timer (WWDT) Controller + +maintainers: + - Wolfram Sang + +properties: + compatible: + oneOf: + - items: + - enum: + - renesas,r8a77970-wwdt # R-Car V3M + - renesas,r8a77980-wwdt # R-Car V3H + - const: renesas,rcar-gen3-wwdt + + - items: + - enum: + - renesas,r8a779a0-wwdt # R-Car V3U + - renesas,r8a779f0-wwdt # R-Car S4 + - renesas,r8a779g0-wwdt # R-Car V4H + - renesas,r8a779h0-wwdt # R-Car V4M + - const: renesas,rcar-gen4-wwdt + + reg: + maxItems: 1 + + interrupts: + items: + - description: Pretimeout, 75% of overflow reached + - description: Error occurred + + interrupt-names: + items: + - const: pretimeout + - const: error + + clocks: + items: + - description: Counting clock + - description: Bus clock + + clock-names: + items: + - const: cnt + - const: bus + + resets: + minItems: 1 + maxItems: 2 + + reset-names: + minItems: 1 + items: + - const: cnt + - const: bus + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - resets + - reset-names + - power-domains + +allOf: + - $ref: watchdog.yaml# + + - if: + properties: + compatible: + contains: + enum: + - renesas,r8a779a0-wwdt + - renesas,r8a779f0-wwdt + then: + properties: + resets: + minItems: 2 + reset-names: + minItems: 2 + +additionalProperties: false + +examples: + - | + #include + #include + #include + + watchdog@ffc90000 { + compatible = "renesas,r8a779g0-wwdt", + "renesas,rcar-gen4-wwdt"; + reg = <0xffc90000 0x10>; + interrupts = , + ; + interrupt-names = "pretimeout", "error"; + clocks = <&cpg CPG_CORE R8A779G0_CLK_R>, + <&cpg CPG_CORE R8A779G0_CLK_SASYNCRT>; + clock-names = "cnt", "bus"; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 1200>; + reset-names = "cnt"; + }; -- 2.47.2