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Wed, 15 Oct 2025 06:43:20 -0700 (PDT) Received: from hackbox.lan ([86.121.7.169]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46fab3d2d65sm174180795e9.2.2025.10.15.06.43.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Oct 2025 06:43:17 -0700 (PDT) From: Abel Vesa Subject: [PATCH 0/2] phy: qcom: qmp-pcie: Add support for Glymur PCIe Gen4x2 PHY Date: Wed, 15 Oct 2025 16:42:53 +0300 Message-Id: <20251015-phy-qcom-pcie-add-glymur-v1-0-1af8fd14f033@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAN2k72gC/x3MTQqAIBBA4avErBvQQKGuEi1MJxvox5Qiie6et PwW7z2QKDIl6KoHIl2ceN8KZF2Bnc3mCdkVQyMaJYVUGOaMh91XDJYJjXPol7yeEUWrR+1aJSd joeQh0sT3v+6H9/0Ah5x2PmoAAAA= X-Change-ID: 20251015-phy-qcom-pcie-add-glymur-096b6d951fac To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Wenbin Yao , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa X-Mailer: b4 0.15-dev-dedf8 X-Developer-Signature: v=1; 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a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE The Glymur platform comes with two PCIe Gen4 2-lanes controllers. Add support for their PHYs and document the compatible. This patchset depends on the following: https://lore.kernel.org/all/20250903-glymur_pcie5-v4-0-c187c2d9d3bd@oss.qualcomm.com/ Signed-off-by: Abel Vesa --- Abel Vesa (2): dt-bindings: phy: sc8280xp-qmp-pcie: Document Glymur PCIe Gen4 2-lanes PHY phy: qcom: qmp-pcie: Add support for Glymur PCIe Gen4x2 PHY .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 3 ++ drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 34 ++++++++++++++++++++++ 2 files changed, 37 insertions(+) --- base-commit: f6d12bdc035bee8f83ee6735a0c00b5e0c7407d4 change-id: 20251015-phy-qcom-pcie-add-glymur-096b6d951fac Best regards, -- Abel Vesa