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From: Albert Yang <yangzh0906@thundersoft.com>
To: robh@kernel.org
Cc: adrian.hunter@intel.com, arnd@arndb.de, bst-upstream@bstai.top,
	catalin.marinas@arm.com, conor+dt@kernel.org,
	devicetree@vger.kernel.org, gordon.ge@bst.ai, krzk+dt@kernel.org,
	linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org,
	ulf.hansson@linaro.org, will@kernel.org,
	yangzh0906@thundersoft.com
Subject: Re: [PATCH 4/9] dt-bindings: mmc: add binding for BST DWCMSHC SDHCI controller
Date: Wed, 15 Oct 2025 17:09:57 +0800	[thread overview]
Message-ID: <20251015090957.1533003-1-yangzh0906@thundersoft.com> (raw)
In-Reply-To: <20250923135620.GA3119392-robh@kernel.org>

Hi Rob,

Thank you for your review and feedback on v4!

On Tue, Sep 23, 2025 at 08:56:20AM -0500, Rob Herring wrote:
> On Tue, Sep 23, 2025 at 02:10:10PM +0800, Albert Yang wrote:
> > Changes for v4:
>
> Thanks for the changelog here, but the subject should have 'PATCH v4' so 
> various tools work.

Acknowledged. I'll ensure the subject line follows the correct format 
"[PATCH v5 X/Y]" in the next version.

> Filename should match compatible.

Agreed. I will rename the file from:
  bst,dwcmshc-sdhci.yaml
to:
  bst,c1200-sdhci.yaml

and update the $id field accordingly from:
  http://devicetree.org/schemas/mmc/bst,dwcmshc-sdhci.yaml#
to:
  http://devicetree.org/schemas/mmc/bst,c1200-sdhci.yaml#

> > +  clock-names:
> > +    items:
> > +      - const: core
>
> Not really any point in having -names when there is only 1 entry.> Not really any point in having -names when there is only 1 entry.

You're right. I'll remove the clock-names property and its entry from the 
required properties list.

> > +  memory-region:
> > +    maxItems: 1
>
> Having this is odd. Please add a description saying what it is for.
>> Having this is odd. Please add a description saying what it is for.

I'll add a description for memory-region:

  memory-region:
    maxItems: 1
    description:
      Phandle to a reserved memory region for DMA bounce buffer. The BST C1200
      SDHCI controller supports only 32-bit DMA addressing, while system memory
      may be located above 4GB address space.

Additionally, I've already corrected the example's compatible string from 
"bst,c1200-dwcmshc-sdhci" to "bst,c1200-sdhci" to match the property definition.

I'll prepare v5 with all the above changes addressed.

Best regards,
Albert Yang

  parent reply	other threads:[~2025-10-15  9:10 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-23  6:10 [PATCH 0/9] arm64: introduce Black Sesame Technologies C1200 SoC and CDCU1.0 board Albert Yang
2025-09-23  6:10 ` [PATCH 1/9] dt-bindings: vendor-prefixes: Add Black Sesame Technologies Co., Ltd Albert Yang
2025-09-23  6:10 ` [PATCH 2/9] dt-bindings: arm: add Black Sesame Technologies (bst) SoC Albert Yang
2025-09-23  6:10 ` [PATCH 3/9] arm64: Kconfig: add ARCH_BST for Black Sesame Technologies SoCs Albert Yang
2025-09-23  6:10 ` [PATCH 4/9] dt-bindings: mmc: add binding for BST DWCMSHC SDHCI controller Albert Yang
2025-09-23 10:13   ` Rob Herring (Arm)
2025-10-15  9:31     ` Albert Yang
2025-09-23 13:56   ` Rob Herring
2025-09-26  3:06     ` [PATCH v4 4/9] dt-bindings: mmc: Add Black Sesame Technologies DWCMSHC SDHCI Albert Yang
2025-10-15  9:09     ` Albert Yang [this message]
2025-09-23  6:10 ` [PATCH 5/9] mmc: sdhci: add Black Sesame Technologies BST C1200 controller driver Albert Yang
2025-09-29 13:25   ` Adrian Hunter
2025-09-23  6:10 ` [PATCH 6/9] mmc: sdhci: allow drivers to pre-allocate bounce buffer Albert Yang
2025-09-29 13:26   ` Adrian Hunter
2025-09-23  6:10 ` [PATCH 7/9] arm64: dts: bst: add support for Black Sesame Technologies C1200 CDCU1.0 board Albert Yang
2025-09-23  6:10 ` [PATCH 8/9] arm64: defconfig: enable BST platform and SDHCI controller support Albert Yang
2025-09-23  6:10 ` [PATCH 9/9] MAINTAINERS: add Black Sesame Technologies (BST) ARM SoC support Albert Yang
2025-09-29 13:29   ` Adrian Hunter
2025-10-15  7:30     ` Albert Yang
2025-09-25  7:06 ` [PATCH 0/9] arm64: introduce Black Sesame Technologies C1200 SoC and CDCU1.0 board Arnd Bergmann
2025-09-25  9:03   ` Albert Yang
2025-09-25 12:11     ` Albert Yang
2025-09-25 13:34       ` Ulf Hansson
2025-09-25 13:38         ` Arnd Bergmann
2025-09-26  1:48           ` Albert Yang

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