* [PATCH v4 0/7] Revise Meta Santabarbara devicetree
@ 2025-10-15 14:38 Fred Chen
2025-10-15 14:38 ` [PATCH v4 1/7] ARM: dts: aspeed: santabarbara: Add blank lines between nodes for readability Fred Chen
` (7 more replies)
0 siblings, 8 replies; 9+ messages in thread
From: Fred Chen @ 2025-10-15 14:38 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Summary:
Revise linux device tree entry related to Meta (Facebook) Santabarbara.
Change log
v3 -> v4:
- add blank lines between nodes for readability
- drop changes to already defined LEDs
- add gpio name debug-card-mux and FM_MAIN_PWREN_RMC_EN_ISO_R
- enable amd apml interface
- add eeprom for prot module
v2 -> v3:
- remove mctp node label
v1 -> v2:
- add 'bmc_ready_noled' LED and update commit message
- add sgpio line name for leak detection
v1:
- add sensor nodes for extension board
- add mctp node for NIC
- adjust LED configuration
Fred Chen (7):
ARM: dts: aspeed: santabarbara: Add blank lines between nodes for
readability
ARM: dts: aspeed: santabarbara: Add sensor support for extension
boards
ARM: dts: aspeed: santabarbara: Enable MCTP for frontend NIC
ARM: dts: aspeed: santabarbara: Add bmc_ready_noled Led
ARM: dts: aspeed: santabarbara: Add gpio line name
ARM: dts: aspeed: santabarbara: Add AMD APML interface support
ARM: dts: aspeed: santabarbara: Add eeprom device node for PRoT module
.../aspeed-bmc-facebook-santabarbara.dts | 919 +++++++++++++++++-
1 file changed, 913 insertions(+), 6 deletions(-)
--
2.49.0
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v4 1/7] ARM: dts: aspeed: santabarbara: Add blank lines between nodes for readability
2025-10-15 14:38 [PATCH v4 0/7] Revise Meta Santabarbara devicetree Fred Chen
@ 2025-10-15 14:38 ` Fred Chen
2025-10-15 14:38 ` [PATCH v4 2/7] ARM: dts: aspeed: santabarbara: Add sensor support for extension boards Fred Chen
` (6 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Fred Chen @ 2025-10-15 14:38 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add missing blank lines between DT nodes to follow the devicetree coding
style and improve readability.
No functional changes.
Signed-off-by: Fred Chen <fredchen.openbmc@gmail.com>
---
.../aspeed-bmc-facebook-santabarbara.dts | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
index 72c84f31bdf6..4adbf15d913f 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
@@ -319,16 +319,19 @@ eeprom@53 {
reg = <0x53>;
};
};
+
i2c4mux0ch1: i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
};
+
i2c4mux0ch2: i2c@2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;
};
+
i2c4mux0ch3: i2c@3 {
reg = <3>;
#address-cells = <1>;
@@ -380,16 +383,19 @@ temperature-sensor@4e {
reg = <0x4e>;
};
};
+
i2c4mux0ch4: i2c@4 {
reg = <4>;
#address-cells = <1>;
#size-cells = <0>;
};
+
i2c4mux0ch5: i2c@5 {
reg = <5>;
#address-cells = <1>;
#size-cells = <0>;
};
+
i2c4mux0ch6: i2c@6 {
reg = <6>;
#address-cells = <1>;
@@ -424,6 +430,7 @@ voltage-sensor@48 {
reg = <0x48>;
};
};
+
i2c4mux0ch7: i2c@7 {
reg = <7>;
#address-cells = <1>;
@@ -469,16 +476,19 @@ i2c5mux0ch0: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
};
+
i2c5mux0ch1: i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
};
+
i2c5mux0ch2: i2c@2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;
};
+
i2c5mux0ch3: i2c@3 {
reg = <3>;
#address-cells = <1>;
@@ -503,6 +513,7 @@ voltage-sensor@48 {
reg = <0x48>;
};
};
+
i2c5mux1ch1: i2c@1 {
reg = <1>;
#address-cells = <1>;
@@ -513,6 +524,7 @@ temperature-sensor@48 {
reg = <0x48>;
};
};
+
i2c5mux1ch2: i2c@2 {
reg = <2>;
#address-cells = <1>;
@@ -542,6 +554,7 @@ power-monitor@45 {
shunt-resistor = <2000>;
};
};
+
i2c5mux1ch3: i2c@3 {
reg = <3>;
#address-cells = <1>;
@@ -663,6 +676,7 @@ temperature-sensor@48 {
reg = <0x48>;
};
};
+
i2c12mux0ch1: i2c@1 {
reg = <1>;
#address-cells = <1>;
@@ -678,6 +692,7 @@ power-monitor@43 {
reg = <0x43>;
};
};
+
i2c12mux0ch2: i2c@2 {
reg = <2>;
#address-cells = <1>;
@@ -695,6 +710,7 @@ power-monitor@41 {
shunt-resistor = <2000>;
};
};
+
i2c12mux0ch3: i2c@3 {
reg = <3>;
#address-cells = <1>;
@@ -712,6 +728,7 @@ power-monitor@45 {
shunt-resistor = <2000>;
};
};
+
i2c12mux0ch4: i2c@4 {
reg = <4>;
#address-cells = <1>;
@@ -722,16 +739,19 @@ voltage-sensor@49 {
reg = <0x49>;
};
};
+
i2c12mux0ch5: i2c@5 {
reg = <5>;
#address-cells = <1>;
#size-cells = <0>;
};
+
i2c12mux0ch6: i2c@6 {
reg = <6>;
#address-cells = <1>;
#size-cells = <0>;
};
+
i2c12mux0ch7: i2c@7 {
reg = <7>;
#address-cells = <1>;
--
2.49.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v4 2/7] ARM: dts: aspeed: santabarbara: Add sensor support for extension boards
2025-10-15 14:38 [PATCH v4 0/7] Revise Meta Santabarbara devicetree Fred Chen
2025-10-15 14:38 ` [PATCH v4 1/7] ARM: dts: aspeed: santabarbara: Add blank lines between nodes for readability Fred Chen
@ 2025-10-15 14:38 ` Fred Chen
2025-10-15 14:38 ` [PATCH v4 3/7] ARM: dts: aspeed: santabarbara: Enable MCTP for frontend NIC Fred Chen
` (5 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Fred Chen @ 2025-10-15 14:38 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
add power monitor and temperature sensors for extension boards in bus 6,
8, 10 and 13.
Signed-off-by: Fred Chen <fredchen.openbmc@gmail.com>
---
.../aspeed-bmc-facebook-santabarbara.dts | 848 ++++++++++++++++++
1 file changed, 848 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
index 4adbf15d913f..89b18afe2b00 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
@@ -39,6 +39,38 @@ aliases {
i2c37 = &i2c12mux0ch5;
i2c38 = &i2c12mux0ch6;
i2c39 = &i2c12mux0ch7;
+ i2c48 = &i2c6mux0ch0;
+ i2c49 = &i2c6mux0ch1;
+ i2c50 = &i2c6mux0ch2;
+ i2c51 = &i2c6mux0ch3;
+ i2c52 = &i2c8mux0ch0;
+ i2c53 = &i2c8mux0ch1;
+ i2c54 = &i2c8mux0ch2;
+ i2c55 = &i2c8mux0ch3;
+ i2c56 = &i2c10mux0ch0;
+ i2c57 = &i2c10mux0ch1;
+ i2c58 = &i2c10mux0ch2;
+ i2c59 = &i2c10mux0ch3;
+ i2c60 = &i2c13mux0ch0;
+ i2c61 = &i2c13mux0ch1;
+ i2c62 = &i2c13mux0ch2;
+ i2c63 = &i2c13mux0ch3;
+ i2c64 = &i2c6mux1ch0;
+ i2c65 = &i2c6mux1ch1;
+ i2c66 = &i2c6mux1ch2;
+ i2c67 = &i2c6mux1ch3;
+ i2c68 = &i2c8mux1ch0;
+ i2c69 = &i2c8mux1ch1;
+ i2c70 = &i2c8mux1ch2;
+ i2c71 = &i2c8mux1ch3;
+ i2c72 = &i2c10mux1ch0;
+ i2c73 = &i2c10mux1ch1;
+ i2c74 = &i2c10mux1ch2;
+ i2c75 = &i2c10mux1ch3;
+ i2c76 = &i2c13mux1ch0;
+ i2c77 = &i2c13mux1ch1;
+ i2c78 = &i2c13mux1ch2;
+ i2c79 = &i2c13mux1ch3;
};
chosen {
@@ -587,6 +619,210 @@ eeprom@52 {
compatible = "atmel,24c256";
reg = <0x52>;
};
+
+ i2c-mux@71 {
+ compatible = "nxp,pca9546";
+ reg = <0x71>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c6mux0ch0: i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ temperature-sensor@64 {
+ compatible = "microchip,mcp9600";
+ reg = <0x64>;
+ };
+
+ temperature-sensor@65 {
+ compatible = "microchip,mcp9600";
+ reg = <0x65>;
+ };
+
+ temperature-sensor@67 {
+ compatible = "microchip,mcp9600";
+ reg = <0x67>;
+ };
+
+ i2c-mux@72 {
+ compatible = "nxp,pca9546";
+ reg = <0x72>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c6mux1ch0: i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c6mux1ch1: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ voltage-sensor@48 {
+ compatible = "ti,ads7830";
+ reg = <0x48>;
+ };
+
+ voltage-sensor@49 {
+ compatible = "ti,ads7830";
+ reg = <0x49>;
+ };
+
+ temperature-sensor@4a {
+ compatible = "ti,tmp175";
+ reg = <0x4a>;
+ };
+
+ temperature-sensor@4b {
+ compatible = "ti,tmp175";
+ reg = <0x4b>;
+ };
+
+ eeprom@56 {
+ compatible = "atmel,24c256";
+ reg = <0x56>;
+ };
+ };
+
+ i2c6mux1ch2: i2c@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c6mux1ch3: i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
+
+ i2c6mux0ch1: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ potentiometer@2c {
+ compatible = "adi,ad5272-020";
+ reg = <0x2c>;
+ };
+
+ potentiometer@2e {
+ compatible = "adi,ad5272-020";
+ reg = <0x2e>;
+ };
+
+ potentiometer@2f {
+ compatible = "adi,ad5272-020";
+ reg = <0x2f>;
+ };
+
+ power-monitor@40 {
+ compatible = "ti,ina238";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@44 {
+ compatible = "ti,ina238";
+ reg = <0x44>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@45 {
+ compatible = "ti,ina238";
+ reg = <0x45>;
+ shunt-resistor = <1000>;
+ };
+ };
+
+ i2c6mux0ch2: i2c@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ potentiometer@2c {
+ compatible = "adi,ad5272-020";
+ reg = <0x2c>;
+ };
+
+ potentiometer@2e {
+ compatible = "adi,ad5272-020";
+ reg = <0x2e>;
+ };
+
+ potentiometer@2f {
+ compatible = "adi,ad5272-020";
+ reg = <0x2f>;
+ };
+
+ power-monitor@40 {
+ compatible = "ti,ina238";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@44 {
+ compatible = "ti,ina238";
+ reg = <0x44>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@45 {
+ compatible = "ti,ina238";
+ reg = <0x45>;
+ shunt-resistor = <1000>;
+ };
+ };
+
+ i2c6mux0ch3: i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ voltage-sensor@1d {
+ compatible = "ti,adc128d818";
+ reg = <0x1d>;
+ ti,mode = /bits/ 8 <1>;
+ };
+
+ voltage-sensor@37 {
+ compatible = "ti,adc128d818";
+ reg = <0x37>;
+ ti,mode = /bits/ 8 <1>;
+ };
+
+ power-monitor@40 {
+ compatible = "ti,ina238";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@45 {
+ compatible = "ti,ina238";
+ reg = <0x45>;
+ shunt-resistor = <1000>;
+ };
+
+ temperature-sensor@48 {
+ compatible = "ti,tmp175";
+ reg = <0x48>;
+ };
+
+ temperature-sensor@49 {
+ compatible = "ti,tmp175";
+ reg = <0x49>;
+ };
+ };
+ };
};
&i2c7 {
@@ -601,6 +837,210 @@ eeprom@52 {
compatible = "atmel,24c256";
reg = <0x52>;
};
+
+ i2c-mux@71 {
+ compatible = "nxp,pca9546";
+ reg = <0x71>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c8mux0ch0: i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ temperature-sensor@64 {
+ compatible = "microchip,mcp9600";
+ reg = <0x64>;
+ };
+
+ temperature-sensor@65 {
+ compatible = "microchip,mcp9600";
+ reg = <0x65>;
+ };
+
+ temperature-sensor@67 {
+ compatible = "microchip,mcp9600";
+ reg = <0x67>;
+ };
+
+ i2c-mux@72 {
+ compatible = "nxp,pca9546";
+ reg = <0x72>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c8mux1ch0: i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c8mux1ch1: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ voltage-sensor@48 {
+ compatible = "ti,ads7830";
+ reg = <0x48>;
+ };
+
+ voltage-sensor@49 {
+ compatible = "ti,ads7830";
+ reg = <0x49>;
+ };
+
+ temperature-sensor@4a {
+ compatible = "ti,tmp175";
+ reg = <0x4a>;
+ };
+
+ temperature-sensor@4b {
+ compatible = "ti,tmp175";
+ reg = <0x4b>;
+ };
+
+ eeprom@56 {
+ compatible = "atmel,24c256";
+ reg = <0x56>;
+ };
+ };
+
+ i2c8mux1ch2: i2c@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c8mux1ch3: i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
+
+ i2c8mux0ch1: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ potentiometer@2c {
+ compatible = "adi,ad5272-020";
+ reg = <0x2c>;
+ };
+
+ potentiometer@2e {
+ compatible = "adi,ad5272-020";
+ reg = <0x2e>;
+ };
+
+ potentiometer@2f {
+ compatible = "adi,ad5272-020";
+ reg = <0x2f>;
+ };
+
+ power-monitor@40 {
+ compatible = "ti,ina238";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@44 {
+ compatible = "ti,ina238";
+ reg = <0x44>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@45 {
+ compatible = "ti,ina238";
+ reg = <0x45>;
+ shunt-resistor = <1000>;
+ };
+ };
+
+ i2c8mux0ch2: i2c@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ potentiometer@2c {
+ compatible = "adi,ad5272-020";
+ reg = <0x2c>;
+ };
+
+ potentiometer@2e {
+ compatible = "adi,ad5272-020";
+ reg = <0x2e>;
+ };
+
+ potentiometer@2f {
+ compatible = "adi,ad5272-020";
+ reg = <0x2f>;
+ };
+
+ power-monitor@40 {
+ compatible = "ti,ina238";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@44 {
+ compatible = "ti,ina238";
+ reg = <0x44>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@45 {
+ compatible = "ti,ina238";
+ reg = <0x45>;
+ shunt-resistor = <1000>;
+ };
+ };
+
+ i2c8mux0ch3: i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ voltage-sensor@1d {
+ compatible = "ti,adc128d818";
+ reg = <0x1d>;
+ ti,mode = /bits/ 8 <1>;
+ };
+
+ voltage-sensor@37 {
+ compatible = "ti,adc128d818";
+ reg = <0x37>;
+ ti,mode = /bits/ 8 <1>;
+ };
+
+ power-monitor@40 {
+ compatible = "ti,ina238";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@45 {
+ compatible = "ti,ina238";
+ reg = <0x45>;
+ shunt-resistor = <1000>;
+ };
+
+ temperature-sensor@48 {
+ compatible = "ti,tmp175";
+ reg = <0x48>;
+ };
+
+ temperature-sensor@49 {
+ compatible = "ti,tmp175";
+ reg = <0x49>;
+ };
+ };
+ };
};
&i2c9 {
@@ -632,6 +1072,210 @@ eeprom@52 {
compatible = "atmel,24c256";
reg = <0x52>;
};
+
+ i2c-mux@71 {
+ compatible = "nxp,pca9546";
+ reg = <0x71>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c10mux0ch0: i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ temperature-sensor@64 {
+ compatible = "microchip,mcp9600";
+ reg = <0x64>;
+ };
+
+ temperature-sensor@65 {
+ compatible = "microchip,mcp9600";
+ reg = <0x65>;
+ };
+
+ temperature-sensor@67 {
+ compatible = "microchip,mcp9600";
+ reg = <0x67>;
+ };
+
+ i2c-mux@72 {
+ compatible = "nxp,pca9546";
+ reg = <0x72>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c10mux1ch0: i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c10mux1ch1: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ voltage-sensor@48 {
+ compatible = "ti,ads7830";
+ reg = <0x48>;
+ };
+
+ voltage-sensor@49 {
+ compatible = "ti,ads7830";
+ reg = <0x49>;
+ };
+
+ temperature-sensor@4a {
+ compatible = "ti,tmp175";
+ reg = <0x4a>;
+ };
+
+ temperature-sensor@4b {
+ compatible = "ti,tmp175";
+ reg = <0x4b>;
+ };
+
+ eeprom@56 {
+ compatible = "atmel,24c256";
+ reg = <0x56>;
+ };
+ };
+
+ i2c10mux1ch2: i2c@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c10mux1ch3: i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
+
+ i2c10mux0ch1: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ potentiometer@2c {
+ compatible = "adi,ad5272-020";
+ reg = <0x2c>;
+ };
+
+ potentiometer@2e {
+ compatible = "adi,ad5272-020";
+ reg = <0x2e>;
+ };
+
+ potentiometer@2f {
+ compatible = "adi,ad5272-020";
+ reg = <0x2f>;
+ };
+
+ power-monitor@40 {
+ compatible = "ti,ina238";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@44 {
+ compatible = "ti,ina238";
+ reg = <0x44>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@45 {
+ compatible = "ti,ina238";
+ reg = <0x45>;
+ shunt-resistor = <1000>;
+ };
+ };
+
+ i2c10mux0ch2: i2c@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ potentiometer@2c {
+ compatible = "adi,ad5272-020";
+ reg = <0x2c>;
+ };
+
+ potentiometer@2e {
+ compatible = "adi,ad5272-020";
+ reg = <0x2e>;
+ };
+
+ potentiometer@2f {
+ compatible = "adi,ad5272-020";
+ reg = <0x2f>;
+ };
+
+ power-monitor@40 {
+ compatible = "ti,ina238";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@44 {
+ compatible = "ti,ina238";
+ reg = <0x44>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@45 {
+ compatible = "ti,ina238";
+ reg = <0x45>;
+ shunt-resistor = <1000>;
+ };
+ };
+
+ i2c10mux0ch3: i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ voltage-sensor@1d {
+ compatible = "ti,adc128d818";
+ reg = <0x1d>;
+ ti,mode = /bits/ 8 <1>;
+ };
+
+ voltage-sensor@37 {
+ compatible = "ti,adc128d818";
+ reg = <0x37>;
+ ti,mode = /bits/ 8 <1>;
+ };
+
+ power-monitor@40 {
+ compatible = "ti,ina238";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@45 {
+ compatible = "ti,ina238";
+ reg = <0x45>;
+ shunt-resistor = <1000>;
+ };
+
+ temperature-sensor@48 {
+ compatible = "ti,tmp175";
+ reg = <0x48>;
+ };
+
+ temperature-sensor@49 {
+ compatible = "ti,tmp175";
+ reg = <0x49>;
+ };
+ };
+ };
};
&i2c11 {
@@ -768,6 +1412,210 @@ eeprom@52 {
compatible = "atmel,24c256";
reg = <0x52>;
};
+
+ i2c-mux@71 {
+ compatible = "nxp,pca9546";
+ reg = <0x71>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c13mux0ch0: i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ temperature-sensor@64 {
+ compatible = "microchip,mcp9600";
+ reg = <0x64>;
+ };
+
+ temperature-sensor@65 {
+ compatible = "microchip,mcp9600";
+ reg = <0x65>;
+ };
+
+ temperature-sensor@67 {
+ compatible = "microchip,mcp9600";
+ reg = <0x67>;
+ };
+
+ i2c-mux@72 {
+ compatible = "nxp,pca9546";
+ reg = <0x72>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c13mux1ch0: i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c13mux1ch1: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ voltage-sensor@48 {
+ compatible = "ti,ads7830";
+ reg = <0x48>;
+ };
+
+ voltage-sensor@49 {
+ compatible = "ti,ads7830";
+ reg = <0x49>;
+ };
+
+ temperature-sensor@4a {
+ compatible = "ti,tmp175";
+ reg = <0x4a>;
+ };
+
+ temperature-sensor@4b {
+ compatible = "ti,tmp175";
+ reg = <0x4b>;
+ };
+
+ eeprom@56 {
+ compatible = "atmel,24c256";
+ reg = <0x56>;
+ };
+ };
+
+ i2c13mux1ch2: i2c@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c13mux1ch3: i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
+
+ i2c13mux0ch1: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ potentiometer@2c {
+ compatible = "adi,ad5272-020";
+ reg = <0x2c>;
+ };
+
+ potentiometer@2e {
+ compatible = "adi,ad5272-020";
+ reg = <0x2e>;
+ };
+
+ potentiometer@2f {
+ compatible = "adi,ad5272-020";
+ reg = <0x2f>;
+ };
+
+ power-monitor@40 {
+ compatible = "ti,ina238";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@44 {
+ compatible = "ti,ina238";
+ reg = <0x44>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@45 {
+ compatible = "ti,ina238";
+ reg = <0x45>;
+ shunt-resistor = <1000>;
+ };
+ };
+
+ i2c13mux0ch2: i2c@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ potentiometer@2c {
+ compatible = "adi,ad5272-020";
+ reg = <0x2c>;
+ };
+
+ potentiometer@2e {
+ compatible = "adi,ad5272-020";
+ reg = <0x2e>;
+ };
+
+ potentiometer@2f {
+ compatible = "adi,ad5272-020";
+ reg = <0x2f>;
+ };
+
+ power-monitor@40 {
+ compatible = "ti,ina238";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@44 {
+ compatible = "ti,ina238";
+ reg = <0x44>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@45 {
+ compatible = "ti,ina238";
+ reg = <0x45>;
+ shunt-resistor = <1000>;
+ };
+ };
+
+ i2c13mux0ch3: i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ voltage-sensor@1d {
+ compatible = "ti,adc128d818";
+ reg = <0x1d>;
+ ti,mode = /bits/ 8 <1>;
+ };
+
+ voltage-sensor@37 {
+ compatible = "ti,adc128d818";
+ reg = <0x37>;
+ ti,mode = /bits/ 8 <1>;
+ };
+
+ power-monitor@40 {
+ compatible = "ti,ina238";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+
+ power-monitor@45 {
+ compatible = "ti,ina238";
+ reg = <0x45>;
+ shunt-resistor = <1000>;
+ };
+
+ temperature-sensor@48 {
+ compatible = "ti,tmp175";
+ reg = <0x48>;
+ };
+
+ temperature-sensor@49 {
+ compatible = "ti,tmp175";
+ reg = <0x49>;
+ };
+ };
+ };
};
&i2c14 {
--
2.49.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v4 3/7] ARM: dts: aspeed: santabarbara: Enable MCTP for frontend NIC
2025-10-15 14:38 [PATCH v4 0/7] Revise Meta Santabarbara devicetree Fred Chen
2025-10-15 14:38 ` [PATCH v4 1/7] ARM: dts: aspeed: santabarbara: Add blank lines between nodes for readability Fred Chen
2025-10-15 14:38 ` [PATCH v4 2/7] ARM: dts: aspeed: santabarbara: Add sensor support for extension boards Fred Chen
@ 2025-10-15 14:38 ` Fred Chen
2025-10-15 14:39 ` [PATCH v4 4/7] ARM: dts: aspeed: santabarbara: Add bmc_ready_noled Led Fred Chen
` (4 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Fred Chen @ 2025-10-15 14:38 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add the mctp-controller property and MCTP node to enable frontend NIC
management via PLDM over MCTP.
Signed-off-by: Fred Chen <fredchen.openbmc@gmail.com>
---
.../boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
index 89b18afe2b00..b190ab344aa7 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
@@ -1279,8 +1279,15 @@ temperature-sensor@49 {
};
&i2c11 {
+ multi-master;
+ mctp-controller;
status = "okay";
+ mctp@10 {
+ compatible = "mctp-i2c-controller";
+ reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
+ };
+
// OCP NIC TEMP
temperature-sensor@1f {
compatible = "ti,tmp421";
--
2.49.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v4 4/7] ARM: dts: aspeed: santabarbara: Add bmc_ready_noled Led
2025-10-15 14:38 [PATCH v4 0/7] Revise Meta Santabarbara devicetree Fred Chen
` (2 preceding siblings ...)
2025-10-15 14:38 ` [PATCH v4 3/7] ARM: dts: aspeed: santabarbara: Enable MCTP for frontend NIC Fred Chen
@ 2025-10-15 14:39 ` Fred Chen
2025-10-15 14:39 ` [PATCH v4 5/7] ARM: dts: aspeed: santabarbara: Add gpio line name Fred Chen
` (3 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Fred Chen @ 2025-10-15 14:39 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add a 'bmc_ready_noled' LED on GPIOB3 with GPIO_TRANSITORY to ensure its
state resets on BMC reboot.
Signed-off-by: Fred Chen <fredchen.openbmc@gmail.com>
---
.../arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
index b190ab344aa7..c0334abf9cda 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
@@ -104,6 +104,11 @@ led-2 {
default-state = "off";
gpios = <&gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
};
+
+ led-3 {
+ label = "bmc_ready_noled";
+ gpios = <&gpio0 ASPEED_GPIO(B, 3) (GPIO_ACTIVE_HIGH|GPIO_TRANSITORY)>;
+ };
};
memory@80000000 {
--
2.49.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v4 5/7] ARM: dts: aspeed: santabarbara: Add gpio line name
2025-10-15 14:38 [PATCH v4 0/7] Revise Meta Santabarbara devicetree Fred Chen
` (3 preceding siblings ...)
2025-10-15 14:39 ` [PATCH v4 4/7] ARM: dts: aspeed: santabarbara: Add bmc_ready_noled Led Fred Chen
@ 2025-10-15 14:39 ` Fred Chen
2025-10-15 14:39 ` [PATCH v4 6/7] ARM: dts: aspeed: santabarbara: Add AMD APML interface support Fred Chen
` (2 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Fred Chen @ 2025-10-15 14:39 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add GPIO line name for userspace control or monitoring
- Add leak-related line names to report chassis leak event
- Add debug-card-mux to control debug card access
- Add FM_MAIN_PWREN_RMC_EN_ISO_R to receive RMC power control signal
Signed-off-by: Fred Chen <fredchen.openbmc@gmail.com>
---
.../aspeed-bmc-facebook-santabarbara.dts | 18 +++++++++++++-----
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
index c0334abf9cda..3f36c8e03f48 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
@@ -208,7 +208,7 @@ &gpio0 {
"led-postcode-2","led-postcode-3",
"led-postcode-4","led-postcode-5",
"led-postcode-6","led-postcode-7",
- /*O0-O7*/ "","","","","","","","",
+ /*O0-O7*/ "","","","","","","","debug-card-mux",
/*P0-P7*/ "power-button","","reset-button","",
"led-power","","","",
/*Q0-Q7*/ "","","","","","","","",
@@ -1744,7 +1744,9 @@ &sgpiom0 {
"FM_IOEXP_U541_INT_N","",
/*H4-H7 line 120-127*/
"FM_IOEXP_PDB2_U1003_INT_N","",
- "","","","","","",
+ "","",
+ "","",
+ "FM_MAIN_PWREN_RMC_EN_ISO_R","",
/*I0-I3 line 128-135*/
"","","","",
"PDB_IRQ_PMBUS_ALERT_ISO_R_N","",
@@ -1804,11 +1806,17 @@ &sgpiom0 {
"PRSNT_LEAK_CABLE_1_R_N","",
"PRSNT_LEAK_CABLE_2_R_N","",
"PRSNT_HDT_N","",
- "","",
+ "LEAK_SWB_COLDPLATE","",
/*P0-P3 line 240-247*/
- "","","","","","","","",
+ "LEAK_R3_COLDPLATE","",
+ "LEAK_R2_COLDPLATE","",
+ "LEAK_R1_COLDPLATE","",
+ "LEAK_R0_COLDPLATE","",
/*P4-P7 line 248-255*/
- "","","","","","","","";
+ "LEAK_MB_COLDPLATE","",
+ "LEAK_PDB1_RIGHT_MANIFOLD","",
+ "LEAK_PDB1_LEFT_MANIFOLD","",
+ "LEAK_MB_MANIFOLD","";
status = "okay";
};
--
2.49.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v4 6/7] ARM: dts: aspeed: santabarbara: Add AMD APML interface support
2025-10-15 14:38 [PATCH v4 0/7] Revise Meta Santabarbara devicetree Fred Chen
` (4 preceding siblings ...)
2025-10-15 14:39 ` [PATCH v4 5/7] ARM: dts: aspeed: santabarbara: Add gpio line name Fred Chen
@ 2025-10-15 14:39 ` Fred Chen
2025-10-15 14:39 ` [PATCH v4 7/7] ARM: dts: aspeed: santabarbara: Add eeprom device node for PRoT module Fred Chen
2025-10-17 6:19 ` [PATCH v4 0/7] Revise Meta Santabarbara devicetree Andrew Jeffery
7 siblings, 0 replies; 9+ messages in thread
From: Fred Chen @ 2025-10-15 14:39 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Enable AMD APML related features
- add amd sbrmi node for SoC power reading
- add amd sbtsi node for SoC temperature reading
- rename the P0_I3C_APML_ALERT_L GPIO to align with the naming
convention expected by the AMD APML tool
Signed-off-by: Fred Chen <fredchen.openbmc@gmail.com>
---
.../aspeed/aspeed-bmc-facebook-santabarbara.dts | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
index 3f36c8e03f48..3ca5109af19b 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
@@ -329,6 +329,20 @@ gpio@26 {
};
};
+&i2c3 {
+ status = "okay";
+
+ sbrmi@3c {
+ compatible = "amd,sbrmi";
+ reg = <0x3c>;
+ };
+
+ sbtsi@4c {
+ compatible = "amd,sbtsi";
+ reg = <0x4c>;
+ };
+};
+
&i2c4 {
status = "okay";
@@ -1755,7 +1769,7 @@ &sgpiom0 {
"P12V_SCM_ADC_ALERT","",
"CPU0_REGS_I2C_ALERT_N","",
"FM_RTC_ALERT_N","",
- "APML_CPU0_ALERT_R_N","",
+ "P0_I3C_APML_ALERT_L","",
/*J0-J3 line 144-151*/
"SMB_RJ45_FIO_TMP_ALERT","",
"FM_SMB_ALERT_MCIO_0A_N","",
--
2.49.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v4 7/7] ARM: dts: aspeed: santabarbara: Add eeprom device node for PRoT module
2025-10-15 14:38 [PATCH v4 0/7] Revise Meta Santabarbara devicetree Fred Chen
` (5 preceding siblings ...)
2025-10-15 14:39 ` [PATCH v4 6/7] ARM: dts: aspeed: santabarbara: Add AMD APML interface support Fred Chen
@ 2025-10-15 14:39 ` Fred Chen
2025-10-17 6:19 ` [PATCH v4 0/7] Revise Meta Santabarbara devicetree Andrew Jeffery
7 siblings, 0 replies; 9+ messages in thread
From: Fred Chen @ 2025-10-15 14:39 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add eeprom device node for PRot module FRU.
Signed-off-by: Fred Chen <fredchen.openbmc@gmail.com>
---
.../arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
index 3ca5109af19b..f74f463cc878 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
@@ -1076,6 +1076,11 @@ eeprom@50 {
reg = <0x50>;
};
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
// BSM FRU
eeprom@56 {
compatible = "atmel,24c64";
--
2.49.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v4 0/7] Revise Meta Santabarbara devicetree
2025-10-15 14:38 [PATCH v4 0/7] Revise Meta Santabarbara devicetree Fred Chen
` (6 preceding siblings ...)
2025-10-15 14:39 ` [PATCH v4 7/7] ARM: dts: aspeed: santabarbara: Add eeprom device node for PRoT module Fred Chen
@ 2025-10-17 6:19 ` Andrew Jeffery
7 siblings, 0 replies; 9+ messages in thread
From: Andrew Jeffery @ 2025-10-17 6:19 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
devicetree, linux-arm-kernel, linux-aspeed, linux-kernel,
Fred Chen
On Wed, 15 Oct 2025 22:38:56 +0800, Fred Chen wrote:
> Summary:
> Revise linux device tree entry related to Meta (Facebook) Santabarbara.
>
> Change log
> v3 -> v4:
> - add blank lines between nodes for readability
> - drop changes to already defined LEDs
> - add gpio name debug-card-mux and FM_MAIN_PWREN_RMC_EN_ISO_R
> - enable amd apml interface
> - add eeprom for prot module
> v2 -> v3:
> - remove mctp node label
> v1 -> v2:
> - add 'bmc_ready_noled' LED and update commit message
> - add sgpio line name for leak detection
> v1:
> - add sensor nodes for extension board
> - add mctp node for NIC
> - adjust LED configuration
>
> [...]
Thanks, I've applied this to the BMC tree.
--
Andrew Jeffery <andrew@codeconstruct.com.au>
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2025-10-17 6:20 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-10-15 14:38 [PATCH v4 0/7] Revise Meta Santabarbara devicetree Fred Chen
2025-10-15 14:38 ` [PATCH v4 1/7] ARM: dts: aspeed: santabarbara: Add blank lines between nodes for readability Fred Chen
2025-10-15 14:38 ` [PATCH v4 2/7] ARM: dts: aspeed: santabarbara: Add sensor support for extension boards Fred Chen
2025-10-15 14:38 ` [PATCH v4 3/7] ARM: dts: aspeed: santabarbara: Enable MCTP for frontend NIC Fred Chen
2025-10-15 14:39 ` [PATCH v4 4/7] ARM: dts: aspeed: santabarbara: Add bmc_ready_noled Led Fred Chen
2025-10-15 14:39 ` [PATCH v4 5/7] ARM: dts: aspeed: santabarbara: Add gpio line name Fred Chen
2025-10-15 14:39 ` [PATCH v4 6/7] ARM: dts: aspeed: santabarbara: Add AMD APML interface support Fred Chen
2025-10-15 14:39 ` [PATCH v4 7/7] ARM: dts: aspeed: santabarbara: Add eeprom device node for PRoT module Fred Chen
2025-10-17 6:19 ` [PATCH v4 0/7] Revise Meta Santabarbara devicetree Andrew Jeffery
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