[PATCH v5 0/6] arm64: introduce Black Sesame Technologies C1200 SoC and CDCU1.0 board

[PATCH v5 0/6] arm64: introduce Black Sesame Technologies C1200 SoC and CDCU1.0 board

[Albert Yang]

This patch series introduces platform support for Black Sesame Technologies
(BST) C1200 SoC and CDCU1.0 ADAS 4C2G board. BST is a leading automotive-grade
computing SoC provider focusing on intelligent driving, computer vision, and AI
capabilities for ADAS and autonomous driving applications. You can find more
information about the SoC and related boards at: https://bst.ai

This series provides the foundational platform enablement including device tree
bindings, SoC and board device trees, platform configuration, and maintainer
information. MMC/SDHCI driver support will be submitted in a separate patch series.

The series includes:

Patch 1: dt-bindings: vendor-prefixes: Add Black Sesame Technologies Co., Ltd.
- Adds BST vendor prefix to device tree vendor prefixes
- Provides company information and website link

Patch 2: dt-bindings: arm: add Black Sesame Technologies (bst) SoC
- Adds device tree bindings for BST ARM SoC family
- Defines compatible strings for C1200 SoC and CDCU1.0 board

Patch 3: arm64: Kconfig: add ARCH_BST for Black Sesame Technologies SoCs
- Adds ARCH_BST configuration option for BST SoC family
- Enables platform-specific features and driver dependencies

Patch 4: arm64: dts: bst: add support for Black Sesame Technologies C1200 CDCU1.0 board
- Complete device tree support for BST C1200 CDCU1.0 ADAS 4C2G board
- Includes SoC dtsi and board-specific dts files
- Defines CPU, memory, peripherals, and platform-specific configurations

Patch 5: arm64: defconfig: enable BST platform support
- Enables CONFIG_ARCH_BST in ARM64 defconfig
- Provides out-of-box support for BST platforms

Patch 6: MAINTAINERS: add Black Sesame Technologies (BST) ARM SoC support
- Adds maintainer entry for BST ARM SoC support
- Covers device tree bindings and board files
- Sets status as "Supported" based on review feedback

Changes for v5:
- Remove MMC-related patches (dt-bindings mmc, mmc driver, bounce buffer enhancement)
  as they will be submitted separately in a dedicated MMC patch series
- Patch 4 (arm64: dts): Remove MMC node and MMC clock from SoC DTSI completely; remove MMC node override in board DTS (MMC driver and bindings will be submitted separately)
- Patch 5 (arm64: defconfig): Remove CONFIG_MMC_SDHCI_BST configuration
- Patch 6 (MAINTAINERS): Remove MMC driver and dt-bindings file entries; change status
  from "Maintained" to "Supported" based on review feedback
- Rebase to v6.18-rc1

Changes for v4:
- Rebase to 6.17-rc5
- Patch 1 (dt-bindings: vendor-prefixes):
	- Adjust ^bst to the correct alphabetical order
	- Adjust Acked-by order
- Patch 2 (dt-bindings: arm):
	- Remove Signed-off-by: Ge Gordon
	- Add Reviewed-by Krzysztof Kozlowski info
- Patch 3 (arm64: Kconfig):
	- Remove Signed-off-by: Ge Gordon
- Patch 4 (arm64: dts):
	- Remove Signed-off-by line for Ge Gordon
	- Reorder device tree node properties for better consistency
	- CPU nodes: move `device_type` before `compatible`, add explicit `reg` values
	- MMC node: change compatible from `bst,c1200-dwcmshc-sdhci` to `bst,c1200-sdhci`
	- MMC node: remove `bus-width` and `non-removable` from SoC dtsi, move to board dts
	- SoC node: reorder properties (`ranges` before address/size cells)
	- UART node: reorder properties (clock-frequency before interrupts)
	- GIC node: reorder properties for better readability
	- Timer node: reorder properties (always-on before interrupt-parent)
	- Board DTS: add `bus-width = <8>` and `non-removable` to MMC node
	- Board DTS: reorder MMC and UART node references
- Patch 5 (arm64: defconfig):
	- move CONFIG_MMC_SDHCI_BST before CONFIG_MMC_SDHCI_F_SDH30
	- Remove Signed-off-by line for Ge Gordon
	- Simplify commit message (remove detailed description about eMMC/SD functionality)
- Patch 6 (MAINTAINERS):
	- Changed file name: sdhci-of-bst-c1200.c to sdhci-of-bst.c
	- Change title from "add and consolidate" to just "add"
	- Simplify commit message description
	- Remove Signed-off-by line for Ge Gordon

Changes for v3:
- Patch 2: Add Signed-off-by: Ge Gordon
- Patch 3: Reword subject from "for bst silicons" to "for Black Sesame Technologies SoCs"
	and drop unrelated whitespace hunk
- Patch 4: Split defconfig enablement out into dedicated patch, refine memory description,
	adjust node ordering, remove gic mask
- Patch 5: Also enable CONFIG_ARCH_BST in arm64 defconfig

Changes for v2:
- Patch 2: Remove unnecessary pipe in description, drop invalid compatible entry,
	remove root node definition
- Patch 3: Place configuration entry in correct alphabetical order, use generic family name,
	follow upstream naming conventions
- Patch 4: Reorganize memory map, update controller definitions, remove deprecated
	properties, standardize interrupt definitions, add root compatible string

Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>
---

Albert Yang (6):
  dt-bindings: vendor-prefixes: Add Black Sesame Technologies Co., Ltd.
  dt-bindings: arm: add Black Sesame Technologies (bst) SoC
  arm64: Kconfig: add ARCH_BST for Black Sesame Technologies SoCs
  arm64: dts: bst: add support for Black Sesame Technologies C1200
    CDCU1.0 board
  arm64: defconfig: enable BST platform support
  MAINTAINERS: add Black Sesame Technologies (BST) ARM SoC support

 .../devicetree/bindings/arm/bst.yaml          | 31 ++++++
 .../devicetree/bindings/vendor-prefixes.yaml  |  2 +
 MAINTAINERS                                   |  8 ++
 arch/arm64/Kconfig.platforms                  |  8 ++
 arch/arm64/boot/dts/Makefile                  |  1 +
 arch/arm64/boot/dts/bst/Makefile              |  2 +
 .../dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts    | 24 +++++
 arch/arm64/boot/dts/bst/bstc1200.dtsi         | 97 +++++++++++++++++++
 arch/arm64/configs/defconfig                  |  1 +
 9 files changed, 174 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/bst.yaml
 create mode 100644 arch/arm64/boot/dts/bst/Makefile
 create mode 100644 arch/arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts
 create mode 100644 arch/arm64/boot/dts/bst/bstc1200.dtsi

-- 
2.43.0

[PATCH v5 1/6] dt-bindings: vendor-prefixes: Add Black Sesame Technologies Co., Ltd.

[Albert Yang]

Black Sesame Technologies Co., Ltd.s a leading automotive-grade
computing SoC and SoC-based intelligent vehicle solution provider.
Link: https://bst.ai/.

Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
---
Changes for v4:
- adjust ^bst to the correct order
- adjust Acked-by order
Changes for v3:
- No changes

Changes for v2:
- No changes
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index f1d1882009ba..df0a50b5437b 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -251,6 +251,8 @@ patternProperties:
     description: Shanghai Broadmobi Communication Technology Co.,Ltd.
   "^bsh,.*":
     description: BSH Hausgeraete GmbH
+  "^bst,.*":
+    description: Black Sesame Technologies Co., Ltd.
   "^bticino,.*":
     description: Bticino International
   "^buffalo,.*":
-- 
2.43.0

[PATCH v5 2/6] dt-bindings: arm: add Black Sesame Technologies (bst) SoC

[Albert Yang]

Add device tree bindings for Black Sesame Technologies Arm SoC,
it consists several SoC models like C1200, etc.

Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Changes for v4:
- remove Signed-off-by: Ge Gordon
- add Reviewed-by Krzysztof Kozlowski info
Changes for v3:
- Add Signed-off-by: Ge Gordon

Changes for v2:
- Removed unnecessary pipe (`|`) in description
- Dropped invalid `compatible` entry for standalone SoC
- Removed root node (`$nodename: '/'`) definition
---
 .../devicetree/bindings/arm/bst.yaml          | 31 +++++++++++++++++++
 1 file changed, 31 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/bst.yaml

diff --git a/Documentation/devicetree/bindings/arm/bst.yaml b/Documentation/devicetree/bindings/arm/bst.yaml
new file mode 100644
index 000000000000..a3a7f424fd57
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bst.yaml
@@ -0,0 +1,31 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/bst.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: BST platforms
+
+description:
+  Black Sesame Technologies (BST) is a semiconductor company that produces
+  automotive-grade system-on-chips (SoCs) for intelligent driving, focusing
+  on computer vision and AI capabilities. The BST C1200 family includes SoCs
+  for ADAS (Advanced Driver Assistance Systems) and autonomous driving
+  applications.
+
+maintainers:
+  - Ge Gordon <gordon.ge@bst.ai>
+
+properties:
+  $nodename:
+    const: '/'
+  compatible:
+    oneOf:
+      - description: BST C1200 CDCU1.0 ADAS 4C2G board
+        items:
+          - const: bst,c1200-cdcu1.0-adas-4c2g
+          - const: bst,c1200
+
+additionalProperties: true
+
+...
-- 
2.43.0

[PATCH v5 3/6] arm64: Kconfig: add ARCH_BST for Black Sesame Technologies SoCs

[Albert Yang]

Add ARCH_BST configuration option to enable support for Black Sesame
Technologies SoC family. BST produces automotive-grade system-on-chips
for intelligent driving, focusing on computer vision and AI capabilities.
The BST C1200 family includes SoCs for ADAS and autonomous driving
applications.

Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>
---
Changes for v4:
- remove Signed-off-by: Ge Gordon

Changes for v3:
- Reword subject from "for bst silicons" to "for Black Sesame Technologies
SoCs"
- drop unrelated whitespace hunk

Changes for v2:
- Placed the configuration entry in correct alphabetical order
- Used generic family name (ARCH_BST) instead of SoC-specific naming
- Followed upstream kernel naming and description conventions
---
 arch/arm64/Kconfig.platforms | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 13173795c43d..0ef07343cc3d 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -119,6 +119,14 @@ config ARCH_BLAIZE
 	help
 	  This enables support for the Blaize SoC family
 
+config ARCH_BST
+	bool "Black Sesame Technologies SoC Family"
+	help
+	  This enables support for Black Sesame Technologies (BST) SoC family.
+	  BST produces automotive-grade system-on-chips for intelligent driving,
+	  focusing on computer vision and AI capabilities. The BST C1200 family
+	  includes SoCs for ADAS and autonomous driving applications.
+
 config ARCH_CIX
 	bool "Cixtech SoC family"
 	help
-- 
2.43.0

[PATCH v5 4/6] arm64: dts: bst: add support for Black Sesame Technologies C1200 CDCU1.0 board

[Albert Yang]

Add device tree support for the Black Sesame Technologies (BST) C1200
CDCU1.0 ADAS 4C2G platform. This platform is based on the BST C1200 SoC
family.
The changes include:
- Adding a new BST device tree directory
- Adding Makefile entries to build the BST platform device trees
- Adding the device tree for the BST C1200 CDCU1.0 ADAS 4C2G board
This board features a quad-core Cortex-A78 CPU, and various peripherals
including UART, and interrupt controller.

Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>
---
Changes for v5:
- Remove MMC node and MMC clock from SoC DTSI completely (MMC driver and bindings will be submitted separately)
- Remove MMC node override in board DTS

Changes for v4:
- Remove Signed-off-by line for Ge Gordon
- Reorder device tree node properties for better consistency
- CPU nodes: move `device_type` before `compatible`, add explicit `reg` values
- MMC node: change compatible from `bst,c1200-dwcmshc-sdhci` to `bst,c1200-sdhci`
- MMC node: remove `bus-width` and `non-removable` from SoC dtsi, move to board dts
- SoC node: reorder properties (`ranges` before address/size cells)
- UART node: reorder properties (clock-frequency before interrupts)
- GIC node: reorder properties for better readability
- Timer node: reorder properties (always-on before interrupt-parent)
- Board DTS: add `bus-width = <8>` and `non-removable` to MMC node
- Board DTS: reorder MMC and UART node references

Changes for v3:
- Split defconfig enablement out into a dedicated defconfig patch
- Refine memory description: consolidate ranges in memory node and delete unused memory ranges
- Adjust the order of nodes
- Remove mask of gic

Changes for v2:
- Reorganize memory map into discrete regions
- Update MMC controller definition with split core/CRM register regions
- Remove deprecated properties
- Update compatible string
- Standardize interrupt definitions and numeric formats
- Remove reserved-memory node (superseded by bounce buffers)
- Add root compatible string for platform identification
- Add soc defconfig
---
 arch/arm64/boot/dts/Makefile                  |  1 +
 arch/arm64/boot/dts/bst/Makefile              |  2 +
 .../dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts    | 24 +++++
 arch/arm64/boot/dts/bst/bstc1200.dtsi         | 97 +++++++++++++++++++
 4 files changed, 124 insertions(+)
 create mode 100644 arch/arm64/boot/dts/bst/Makefile
 create mode 100644 arch/arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts
 create mode 100644 arch/arm64/boot/dts/bst/bstc1200.dtsi

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index b0844404eda1..98ec8f1b76e4 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -13,6 +13,7 @@ subdir-y += axiado
 subdir-y += bitmain
 subdir-y += blaize
 subdir-y += broadcom
+subdir-y += bst
 subdir-y += cavium
 subdir-y += cix
 subdir-y += exynos
diff --git a/arch/arm64/boot/dts/bst/Makefile b/arch/arm64/boot/dts/bst/Makefile
new file mode 100644
index 000000000000..4c1b8b4cdad8
--- /dev/null
+++ b/arch/arm64/boot/dts/bst/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_BST) += bstc1200-cdcu1.0-adas_4c2g.dtb
diff --git a/arch/arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts b/arch/arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts
new file mode 100644
index 000000000000..5eb9ef369d8c
--- /dev/null
+++ b/arch/arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include "bstc1200.dtsi"
+
+/ {
+	model = "BST C1200-96 CDCU1.0 4C2G";
+	compatible = "bst,c1200-cdcu1.0-adas-4c2g", "bst,c1200";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@810000000 {
+		device_type = "memory";
+		reg = <0x8 0x10000000 0x0 0x30000000>,
+		      <0x8 0xc0000000 0x1 0x0>,
+		      <0xc 0x00000000 0x0 0x40000000>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/bst/bstc1200.dtsi b/arch/arm64/boot/dts/bst/bstc1200.dtsi
new file mode 100644
index 000000000000..dd13c6bfc3c8
--- /dev/null
+++ b/arch/arm64/boot/dts/bst/bstc1200.dtsi
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	compatible = "bst,c1200";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a78";
+			reg = <0x0>;
+			enable-method = "psci";
+			next-level-cache = <&l2_cache>;
+		};
+
+		cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a78";
+			reg = <0x100>;
+			enable-method = "psci";
+			next-level-cache = <&l2_cache>;
+		};
+
+		cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a78";
+			reg = <0x200>;
+			enable-method = "psci";
+			next-level-cache = <&l2_cache>;
+		};
+
+		cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a78";
+			reg = <0x300>;
+			enable-method = "psci";
+			next-level-cache = <&l2_cache>;
+		};
+
+		l2_cache: l2-cache {
+			compatible = "cache";
+			cache-level = <2>;
+			cache-unified;
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	soc {
+		compatible = "simple-bus";
+		ranges;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		interrupt-parent = <&gic>;
+
+		uart0: serial@20008000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x0 0x20008000 0x0 0x1000>;
+			clock-frequency = <25000000>;
+			interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			status = "disabled";
+		};
+
+		gic: interrupt-controller@32800000 {
+			compatible = "arm,gic-v3";
+			reg = <0x0 0x32800000 0x0 0x10000>,
+			      <0x0 0x32880000 0x0 0x100000>;
+			ranges;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			#interrupt-cells = <3>;
+			interrupt-controller;
+			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		always-on;
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
+	};
+};
-- 
2.43.0

[PATCH v5 5/6] arm64: defconfig: enable BST platform support

[Albert Yang]

Enable support for Black Sesame Technologies (BST) platform
in the ARM64 defconfig:
- CONFIG_ARCH_BST: Enable BST SoC platform support

Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>
---
Changes for v5:
- Remove CONFIG_MMC_SDHCI_BST (MMC patches will be submitted separately)

Changes for v4:
- move CONFIG_MMC_SDHCI_BST before CONFIG_MMC_SDHCI_F_SDH30
- Remove Signed-off-by line for Ge Gordon
- Simplify commit message (remove detailed description about eMMC/SD functionality)

Changes for v3:
- Also enable CONFIG_ARCH_BST in arm64 defconfig (in addition to CONFIG_MMC_SDHCI_BST)

Changes for v2:
- No changes
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index e3a2d37bd104..972cae9bee88 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -47,6 +47,7 @@ CONFIG_ARCH_BCMBCA=y
 CONFIG_ARCH_BRCMSTB=y
 CONFIG_ARCH_BERLIN=y
 CONFIG_ARCH_BLAIZE=y
+CONFIG_ARCH_BST=y
 CONFIG_ARCH_CIX=y
 CONFIG_ARCH_EXYNOS=y
 CONFIG_ARCH_SPARX5=y
-- 
2.43.0

[PATCH v5 6/6] MAINTAINERS: add Black Sesame Technologies (BST) ARM SoC support

[Albert Yang]

Add a MAINTAINERS entry for Black Sesame Technologies (BST) ARM SoC
support. This entry covers device tree bindings, drivers, and board files
for BST SoCs, and platform support.

Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>
---
Change for v5:
  - Remove MMC driver and dt-bindings entries (MMC patches will be submitted separately)
  - Change status from "Maintained" to "Supported" based on review feedback

Change for v4:
  - Changed file name: sdhci-of-bst-c1200.c to sdhci-of-bst.c
  - Changed title from "add and consolidate" to just "add"
  - Simplified commit message description
  - Removed Signed-off-by line for Ge Gordon

Change for v3:
 - No changes

Change for v2:
 - No changes
---
 MAINTAINERS | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 46126ce2f968..841d3f055778 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2543,6 +2543,14 @@ S:	Maintained
 F:	Documentation/devicetree/bindings/arm/blaize.yaml
 F:	arch/arm64/boot/dts/blaize/
 
+ARM/BST SOC SUPPORT
+M:	Ge Gordon <gordon.ge@bst.ai>
+R:	BST Linux Kernel Upstream Group <bst-upstream@bstai.top>
+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S:	Supported
+F:	Documentation/devicetree/bindings/arm/bst.yaml
+F:	arch/arm64/boot/dts/bst/
+
 ARM/CALXEDA HIGHBANK ARCHITECTURE
 M:	Andre Przywara <andre.przywara@arm.com>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-- 
2.43.0

Re: [PATCH v5 0/6] arm64: introduce Black Sesame Technologies C1200 SoC and CDCU1.0 board

[Albert Yang]

Hi Krzysztof,

Gentle ping on this series. It's been two weeks since v5 was posted.

This version addresses the DTS coding style and property ordering issues
from our previous discussion [1]. Following Arnd's suggestion [2], the MMC
patches have been removed and will be submitted separately.

Patch 2/6 (arm bindings) already has your Reviewed-by. The remaining
patches (Kconfig, DTS, defconfig, and MAINTAINERS) are ready for review
when you have time.

Series: https://lore.kernel.org/lkml/20251016120558.2390960-1-yangzh0906@thundersoft.com/

[1] https://lore.kernel.org/lkml/179f19c0-d9fc-4efb-bc78-8dc1e7505b13@kernel.org/
[2] https://lore.kernel.org/lkml/09b1318e-21dc-4354-8733-866b70696295@app.fastmail.com/

Thanks,
Albert

Re: [PATCH v5 0/6] arm64: introduce Black Sesame Technologies C1200 SoC and CDCU1.0 board

[Krzysztof Kozlowski]

On 30/10/2025 12:40, Albert Yang wrote:
> Hi Krzysztof,
> 
> Gentle ping on this series. It's been two weeks since v5 was posted.
> 
> This version addresses the DTS coding style and property ordering issues
> from our previous discussion [1]. Following Arnd's suggestion [2], the MMC
> patches have been removed and will be submitted separately.
> 
> Patch 2/6 (arm bindings) already has your Reviewed-by. The remaining
> patches (Kconfig, DTS, defconfig, and MAINTAINERS) are ready for review
> when you have time.

I don't understand this ping. You received the reviewed from me or other
maintainers, where we were responsible to give such review. Probably you
assume that my job is to review something else here, but sorry, that's
not my job at the time of this patchset was prepared (we don't count
here recent changes because that would mean you ping me after few days...).

Best regards,
Krzysztof

Re: [PATCH v5 0/6] arm64: introduce Black Sesame Technologies C1200 SoC and CDCU1.0 board

[Albert Yang]

On Thu, Oct 30, 2025 at 04:04:39PM +0100, Krzysztof Kozlowski wrote:
> On 30/10/2025 12:40, Albert Yang wrote:
> > Hi Krzysztof,
> >
> > Gentle ping on this series. It's been two weeks since v5 was posted.
> >
> > This version addresses the DTS coding style and property ordering issues
> > from our previous discussion [1]. Following Arnd's suggestion [2], the MMC
> > patches have been removed and will be submitted separately.
> >
> > Patch 2/6 (arm bindings) already has your Reviewed-by. The remaining
> > patches (Kconfig, DTS, defconfig, and MAINTAINERS) are ready for review
> > when you have time.
>
> I don't understand this ping. You received the reviewed from me or other
> maintainers, where we were responsible to give such review. Probably you
> assume that my job is to review something else here, but sorry, that's
> not my job at the time of this patchset was prepared (we don't count
> here recent changes because that would mean you ping me after few days...).
>

My apologies for the confusion. You're absolutely right about the
maintainer responsibilities.

I should clarify why I pinged you: You provided valuable feedback on
earlier versions of this series, including the DTS patches. Since those
changes were made based on your input but hadn't received confirmation,
I wanted to make sure they properly addressed your concerns. However, I
now understand that the SoC-specific patches (Kconfig, DTS, defconfig,
MAINTAINERS) should be reviewed by the ARM SoC maintainers.

Thank you for your reviews and for clarifying the proper process. I'll
follow up with Arnd for the remaining patches.

Best regards,
Albert

Re: [PATCH v5 0/6] arm64: introduce Black Sesame Technologies C1200 SoC and CDCU1.0 board

[Albert Yang]

Hi Arnd,

Following up on the v5 series for BST C1200 SoC support. The dt-bindings
patches have received the necessary reviews (Rob's Acked-by for 1/6 and
Krzysztof's Reviewed-by for 2/6).

I now understand that the SoC-specific patches (Kconfig, DTS, defconfig,
MAINTAINERS) should be reviewed by the ARM SoC maintainers rather than
the DT bindings reviewers. Please correct me if I'm misunderstanding the
process.

In your previous feedback [1], you mentioned you'd be happy to merge the
SoC portions in arch/arm64 and suggested resubmitting for 6.19 once
6.18-rc1 is out. Could you advise on the next steps? Is there anything
I should prepare or address before the 6.19 merge window?

If I've misunderstood anything about the process, please let me know.

Series: https://lore.kernel.org/lkml/20251016120558.2390960-1-yangzh0906@thundersoft.com/

[1] https://lore.kernel.org/lkml/09b1318e-21dc-4354-8733-866b70696295@app.fastmail.com/

Thanks,
Albert

Re: [PATCH v5 0/6] arm64: introduce Black Sesame Technologies C1200 SoC and CDCU1.0 board

[Albert Yang]

Hi Arnd,

Gentle ping on this series. I sent a follow-up two weeks ago [1] but 
haven't heard back yet.

The v5 series has the necessary dt-bindings reviews (Rob's Acked-by 
and Krzysztof's Reviewed-by). Based on your earlier feedback [2], I 
understand this should be queued for 6.19 after 6.18-rc1 is released.

Is there anything blocking this series, or any changes needed? I'm 
happy to address any concerns or rebase/resend if that would be helpful.

If you're busy with other priorities, please let me know if there's a 
better time to follow up or if I should take a different approach.

Original series: https://lore.kernel.org/lkml/20251016120558.2390960-1-yangzh0906@thundersoft.com/

[1] https://lore.kernel.org/lkml/20251031045253.789621-1-yangzh0906@thundersoft.com/
[2] https://lore.kernel.org/lkml/09b1318e-21dc-4354-8733-866b70696295@app.fastmail.com/

Thanks for your time,
Albert