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Sat, 18 Oct 2025 15:02:14 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1760792534; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=h3qGVfK2SD/LkkPK6FoWnj+YJVjMv068rDYD19OUT+E=; b=azNoBMwzDYu7YN3k2fzHDQECdIcyHRn1mcQ1dycC/bGPFw5P05ux39ntTX5TQHMikSkFah /vJKgnkiGYB7JNODQvYInPlSZYSLt87QOUYxCsStZDyyBc864rS/ZIBvoOh5jlqUn8s2ir XSn2VLSq8aighuR84NTb+5eLSNDoYMSC98CW/LcXT1rbqaozXij6jTpS/4ozMFfpwO2jAo 3gIM3+cnsyAMfYxdN9Ddz1iQcaB83twqcBu8ggTxT4ijdQ4hpUJF8XSk0ICTTJZWKX78Ut f1iQrI0xEuQQXDaxCF8NZ0yI/bjfqAvDSnqj8wT8qFm5n8AvFHxQcNcwCEQ/Ig== Authentication-Results: outgoing_mbo_mout; dkim=pass header.d=mailbox.org header.s=mail20150812 header.b=YuwkxWBi; spf=pass (outgoing_mbo_mout: domain of marek.vasut+renesas@mailbox.org designates 2001:67c:2050:b231:465::102 as permitted sender) smtp.mailfrom=marek.vasut+renesas@mailbox.org From: Marek Vasut DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1760792532; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=h3qGVfK2SD/LkkPK6FoWnj+YJVjMv068rDYD19OUT+E=; b=YuwkxWBiRhkh8yRcvWWEHupD2fZ2TeXeldsxk9WeMX+VcsQhw2EVjvMsZEUyPlnVTRFCsn yiYDbEJUaPIHNboCJSiGEzZ2UHbQVFNh3psjYCsROa26oPCdnCneeEDtyXykU9EjxL65BE 2mIrCojKIJcSzIP2VJwihxJBV3tRNakRZPrf8Okgyx4r5zUWw8KFB+Fj/XtPoZqHEn1HAI f1kgooxj1LESFXoOmbjpUbBU0jFEaaLW4XYuECDa1KLhcxusxZpe5g180I1Bg+UwHFwkRn hM+zbCd7GxmSxKJNQYjj47jefN1JGhTdUSxlX7fZBW34FXNWmjlO4fVBwTRuXw== To: linux-arm-kernel@lists.infradead.org Cc: Marek Vasut , Adam Ford , Conor Dooley , David Airlie , Frank Binns , Geert Uytterhoeven , Krzysztof Kozlowski , Kuninori Morimoto , Maarten Lankhorst , Magnus Damm , Matt Coster , Maxime Ripard , Rob Herring , Simona Vetter , Thomas Zimmermann , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 2/2] dt-bindings: gpu: img,powervr-rogue: Rework the allOf section Date: Sat, 18 Oct 2025 15:00:59 +0200 Message-ID: <20251018130147.12831-2-marek.vasut+renesas@mailbox.org> In-Reply-To: <20251018130147.12831-1-marek.vasut+renesas@mailbox.org> References: <20251018130147.12831-1-marek.vasut+renesas@mailbox.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-MBO-RS-META: 8auxodwaynckaux3p717ss91np4c8kp5 X-MBO-RS-ID: 6f19813b49d4405774b X-Rspamd-Queue-Id: 4cphft12WMz9sd7 Rework the current allOf: section such that all handling of clocks/clock-names properties happens first, and all handling of power-domains/power-domain-names happens second. This allows the allOf section to limit various GPU models to matching clocks count in the first half, and apply the same for power-domains count in the second half, without conflating the two limits together. This makes addition of GPU models with different clocks and power-domains count easier. No functional change intended. Signed-off-by: Marek Vasut --- Cc: Adam Ford Cc: Conor Dooley Cc: David Airlie Cc: Frank Binns Cc: Geert Uytterhoeven Cc: Krzysztof Kozlowski Cc: Kuninori Morimoto Cc: Maarten Lankhorst Cc: Magnus Damm Cc: Matt Coster Cc: Maxime Ripard Cc: Rob Herring Cc: Simona Vetter Cc: Thomas Zimmermann Cc: devicetree@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: linux-renesas-soc@vger.kernel.org --- .../bindings/gpu/img,powervr-rogue.yaml | 40 +++++++++++-------- 1 file changed, 24 insertions(+), 16 deletions(-) diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml index bee4ab1a1f805..829febd8e0f40 100644 --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml @@ -86,16 +86,13 @@ allOf: properties: compatible: contains: - const: img,img-axe-1-16m + enum: + - ti,am62-gpu + - ti,j721s2-gpu then: properties: - power-domains: - maxItems: 1 - power-domain-names: + clocks: maxItems: 1 - required: - - power-domains - - power-domain-names - if: properties: @@ -108,13 +105,21 @@ allOf: minItems: 3 clock-names: minItems: 3 + + - if: + properties: + compatible: + contains: + const: img,img-axe-1-16m + then: + properties: power-domains: - items: - - description: The single, unified power domain for the GPU on the - TH1520 SoC, integrating all internal IP power domains. - power-domain-names: false + maxItems: 1 + power-domain-names: + maxItems: 1 required: - power-domains + - power-domain-names - if: properties: @@ -135,13 +140,16 @@ allOf: properties: compatible: contains: - enum: - - ti,am62-gpu - - ti,j721s2-gpu + const: thead,th1520-gpu then: properties: - clocks: - maxItems: 1 + power-domains: + items: + - description: The single, unified power domain for the GPU on the + TH1520 SoC, integrating all internal IP power domains. + power-domain-names: false + required: + - power-domains examples: - | -- 2.51.0