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From: Richard Genoud <richard.genoud@bootlin.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Samuel Holland <samuel@sholland.org>
Cc: "Uwe Kleine-König" <u.kleine-koenig@baylibre.com>,
	"Wentao Liang" <vulab@iscas.ac.cn>,
	"Johan Hovold" <johan@kernel.org>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	linux-mtd@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
	"Richard Genoud" <richard.genoud@bootlin.com>
Subject: [PATCH v3 10/15] mtd: rawnand: sunxi: introduce reg_spare_area in sunxi_nfc_caps
Date: Mon, 20 Oct 2025 12:13:06 +0200	[thread overview]
Message-ID: <20251020101311.256819-11-richard.genoud@bootlin.com> (raw)
In-Reply-To: <20251020101311.256819-1-richard.genoud@bootlin.com>

The H6/H616 spare area register is not at the same offset as the
A10/A23 one, so move its offset into sunxi_nfc_caps.

No functional change.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
---
 drivers/mtd/nand/raw/sunxi_nand.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index e8c08f0139d2..da7b8b81d39e 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -54,7 +54,8 @@
 #define NFC_REG_ECC_ERR_CNT(nfc, x)	((nfc->caps->reg_ecc_err_cnt + (x)) & ~0x3)
 #define NFC_REG_A10_USER_DATA	0x0050
 #define NFC_REG_USER_DATA(nfc, x)	(nfc->caps->reg_user_data + ((x) * 4))
-#define NFC_REG_SPARE_AREA	0x00A0
+#define NFC_REG_SPARE_AREA(nfc) (nfc->caps->reg_spare_area)
+#define NFC_REG_A10_SPARE_AREA	0x00A0
 #define NFC_REG_PAT_ID(nfc) (nfc->caps->reg_pat_id)
 #define NFC_REG_A10_PAT_ID	0x00A4
 #define NFC_REG_MDMA_ADDR	0x00C0
@@ -228,6 +229,7 @@ static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand)
  * @reg_io_data:	I/O data register
  * @reg_ecc_err_cnt:	ECC error counter register
  * @reg_user_data:	User data register
+ * @reg_spare_area:	Spare Area Register
  * @reg_pat_id:		Pattern ID Register
  * @reg_pat_found:	Data Pattern Status Register
  * @random_en_mask:	RANDOM_EN mask in NFC_ECC_CTL register
@@ -244,6 +246,7 @@ struct sunxi_nfc_caps {
 	unsigned int reg_io_data;
 	unsigned int reg_ecc_err_cnt;
 	unsigned int reg_user_data;
+	unsigned int reg_spare_area;
 	unsigned int reg_pat_id;
 	unsigned int reg_pat_found;
 	unsigned int random_en_mask;
@@ -466,7 +469,7 @@ static void sunxi_nfc_select_chip(struct nand_chip *nand, unsigned int cs)
 	if (sel->rb >= 0)
 		ctl |= NFC_RB_SEL(sel->rb);
 
-	writel(mtd->writesize, nfc->regs + NFC_REG_SPARE_AREA);
+	writel(mtd->writesize, nfc->regs + NFC_REG_SPARE_AREA(nfc));
 
 	if (nfc->clk_rate != sunxi_nand->clk_rate) {
 		clk_set_rate(nfc->mod_clk, sunxi_nand->clk_rate);
@@ -2226,6 +2229,7 @@ static const struct sunxi_nfc_caps sunxi_nfc_a10_caps = {
 	.reg_io_data = NFC_REG_A10_IO_DATA,
 	.reg_ecc_err_cnt = NFC_REG_A10_ECC_ERR_CNT,
 	.reg_user_data = NFC_REG_A10_USER_DATA,
+	.reg_spare_area = NFC_REG_A10_SPARE_AREA,
 	.reg_pat_id = NFC_REG_A10_PAT_ID,
 	.reg_pat_found = NFC_REG_ECC_ST,
 	.random_en_mask = BIT(9),
@@ -2243,6 +2247,7 @@ static const struct sunxi_nfc_caps sunxi_nfc_a23_caps = {
 	.reg_io_data = NFC_REG_A23_IO_DATA,
 	.reg_ecc_err_cnt = NFC_REG_A10_ECC_ERR_CNT,
 	.reg_user_data = NFC_REG_A10_USER_DATA,
+	.reg_spare_area = NFC_REG_A10_SPARE_AREA,
 	.reg_pat_id = NFC_REG_A10_PAT_ID,
 	.reg_pat_found = NFC_REG_ECC_ST,
 	.random_en_mask = BIT(9),

  parent reply	other threads:[~2025-10-20 10:14 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-20 10:12 [PATCH v3 00/15] Introduce Allwinner H6/H616 NAND controller support Richard Genoud
2025-10-20 10:12 ` [PATCH v3 01/15] mtd: rawnand: sunxi: Remove superfluous register readings Richard Genoud
2025-10-20 10:12 ` [PATCH v3 02/15] mtd: rawnand: sunxi: move ECC strenghts in sunxi_nfc_caps Richard Genoud
2025-10-20 10:12 ` [PATCH v3 03/15] mtd: rawnand: sunxi: introduce reg_ecc_err_cnt " Richard Genoud
2025-10-20 10:13 ` [PATCH v3 04/15] mtd: rawnand: sunxi: introduce reg_user_data " Richard Genoud
2025-10-22  8:54   ` Miquel Raynal
2025-10-22  9:07     ` Johan Hovold
2025-10-24  7:20     ` Richard GENOUD
2025-10-20 10:13 ` [PATCH v3 05/15] mtd: rawnand: sunxi: rework pattern found registers Richard Genoud
2025-10-22  9:02   ` Miquel Raynal
2025-10-22 10:05   ` Geert Uytterhoeven
2025-10-20 10:13 ` [PATCH v3 06/15] mtd: rawnand: sunxi: add has_ecc_block_512 capability Richard Genoud
2025-10-20 10:13 ` [PATCH v3 07/15] mtd: rawnand: sunxi: introduce ecc_mode_mask in sunxi_nfc_caps Richard Genoud
2025-10-22  9:05   ` Miquel Raynal
2025-10-24  7:52     ` Richard GENOUD
2025-10-20 10:13 ` [PATCH v3 08/15] mtd: rawnand: sunxi: introduce random en/dir " Richard Genoud
2025-10-20 10:13 ` [PATCH v3 09/15] mtd: rawnand: sunxi: introduce reg_pat_id " Richard Genoud
2025-10-20 10:13 ` Richard Genoud [this message]
2025-10-20 10:13 ` [PATCH v3 11/15] mtd: rawnand: sunxi: introduce ecc_err_mask " Richard Genoud
2025-10-20 10:13 ` [PATCH v3 12/15] mtd: rawnand: sunxi: introduce sram_size " Richard Genoud
2025-10-20 10:13 ` [PATCH v3 13/15] mtd: rawnand: sunxi: Add support for H616 nand controller Richard Genoud
2025-10-22  9:18   ` Miquel Raynal
2025-10-28  7:30     ` Richard GENOUD
2025-10-20 10:13 ` [PATCH v3 14/15] dt-bindings: mtd: sunxi: Add H616 compatible Richard Genoud
2025-10-20 17:18   ` Conor Dooley
2025-10-22  9:20   ` Miquel Raynal
2025-10-24  9:08     ` Richard GENOUD
2025-10-20 10:13 ` [PATCH v3 15/15] arm64: dts: allwinner: h616: add NAND controller Richard Genoud

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